Datasheet

Functional Description
98 Intel® Xeon® Processor D-1500 Product Family
Datasheet - Volume 1 of 4: Integrated Platform Controller Hub
March 2015
3.12.6.3 Exiting Sleep States
Sleep states (S1–S5) are exited based on Wake events. The Wake events forces the
system to a full on state (S0), although some non-critical subsystems might still be
shut off and have to be brought back manually. For example, the hard disk may be shut
off during a sleep state and have to be enabled using a GPIO pin before it can be used.
Upon exit from Intel® Xeon® Processor D-1500 Product Family-controlled Sleep
states, the WAK_STS bit is set. The possible causes of Wake Events (and their
restrictions) are shown in Ta b l e 3- 2 5 .
Notes:
1. This column represents what Intel® Xeon® Processor D-1500 Product Family would honor as wake events
but there may be enabling dependencies on the device side which are not enabled after a power loss.
Table 3-25. Causes of Wake Events
Cause How Enabled
Wake from
S1, Sx
Wake from S1,
Sx After
Power Loss
(Note 1)
Wake from
“Reset”
Types
(Note 2)
RTC Alarm Set RTC_EN bit in PM1_EN register. Yes Yes No
Power Button Always enabled as Wake event. Yes Yes Yes
GPI[15:0]
GPIO17, GPIO19,
GPIO21, GPIO22,
GPIO43, GPIO57,
GPIO60
GPE0_EN register
Note: GPIs that are in the core well are
not capable of waking the
system from sleep states when
the core well is not powered.
Yes No No
GPIO27
(Intel LAN solution
uses GPIO27 for PHY
Wake)
Set GP27_EN in GPE0_EN Register. Yes Yes Yes
LAN Will use PME#. Wake enable set with LAN
logic.
Yes Yes No
RI# Set RI_EN bit in GPE0_EN register. Yes Yes No
Primary PME# PME_B0_EN bit in GPE0_EN register. Yes Yes No
Secondary PME# Set PME_EN bit in GPE0_EN register. Yes Yes No
PCI_EXP_WAKE# PCI_EXP_WAKE bit. (Note 3) Yes Yes No
SATA Set PME_EN bit in GPE0_EN register.
(Note 4)
Yes (S1 only) Yes (S1 only) No
PCI_EXP PME
Message
Must use the PCI Express* WAKE# pin
rather than messages for wake from S4
or S5.
Yes (S1 only) Yes (S1 only) No
SMBALERT# Always enabled as Wake event. Yes Yes Yes
SMBus Slave Wake
Message (01h)
Wake/SMI# command always enabled as
a Wake event.
Note: SMBus Slave Message can wake
the system from S1–S5, as well
as from S5 due to Power Button
Override.
Yes Yes Yes
SMBus Host Notify
message received
HOST_NOTIFY_WKEN bit SMBus Slave
Command register. Reported in the
SMB_WAK_STS bit in the GPEO_STS
register.
Yes Yes Yes
Intel
®
ME Non-
Maskable Wake
Always enabled as a wake event. Yes Yes Yes
Integrated WoL
Enable Override
WoL Enable Override bit (in
Configuration Space).
Yes Yes Yes
Wake Alarm Device WADT_EN in GPE0_EN Yes No No