Datasheet

Functional Description
86 Intel® Xeon® Processor D-1500 Product Family
Datasheet - Volume 1 of 4: Integrated Platform Controller Hub
March 2015
abnormal system behavior may occur. For example, IRQ14/15 may not be detected by
Intel® Xeon® Processor D-1500 Product Family's interrupt controller. When the SATA
controller is not running in Native IDE mode, IRQ14 and IRQ15 are used as special
interrupts. If the SATA controller is in native mode, these interrupts can be mapped to
other devices accordingly.
3.10.1 Start Frame
The serial IRQ protocol has two modes of operation which affect the start frame. These
two modes are: Continuous, where Intel® Xeon® Processor D-1500 Product Family is
solely responsible for generating the start frame; and Quiet, where a serial IRQ
peripheral is responsible for beginning the start frame.
The mode that must first be entered when enabling the serial IRQ protocol is
continuous mode. In this mode, Intel® Xeon® Processor D-1500 Product Family
asserts the start frame. This start frame is 4, 6, or 8 PCI clocks wide based upon the
Serial IRQ Control Register, bits 1:0 at 64h in D31:F0 configuration space. This is a
polling mode.
When the serial IRQ stream enters quiet mode (signaled in the Stop Frame), the
SERIRQ line remains inactive and pulled up between the Stop and Start Frame until a
peripheral drives the SERIRQ signal low. Intel® Xeon® Processor D-1500 Product
Family senses the line low and continues to drive it low for the remainder of the Start
Frame. Since the first PCI clock of the start frame was driven by the peripheral in this
mode, Intel® Xeon® Processor D-1500 Product Family drives the SERIRQ line low for 1
PCI clock less than in continuous mode. This mode of operation allows for a quiet, and
therefore lower power, operation.
3.10.2 Data Frames
Once the Start frame has been initiated, all of the SERIRQ peripherals must start
counting frames based on the rising edge of SERIRQ. Each of the IRQ/DATA frames has
exactly 3 phases of 1 clock each:
• Sample Phase. During this phase, the SERIRQ device drives SERIRQ low if the
corresponding interrupt signal is low. If the corresponding interrupt is high, then
the SERIRQ devices tri-state the SERIRQ signal. The SERIRQ line remains high due
to pull-up resistors (there is no internal pull-up resistor on this signal, an external
pull-up resistor is required). A low level during the IRQ0–1 and IRQ2–15 frames
indicates that an active-high ISA interrupt is not being requested, but a low level
during the PCI INT[A:D], SMI#, and IOCHK# frame indicates that an active-low
interrupt is being requested.
• Recovery Phase. During this phase, the device drives the SERIRQ line high if in
the Sample Phase it was driven low. If it was not driven in the sample phase, it is
tri-stated in this phase.
• Turn-around Phase. The device tri-states the SERIRQ line