Datasheet

Intel® Management Engine Subsystem Registers (D22:F[3:0])
Intel® Xeon® Processor D-1500 Product Family 603
Datasheet - Volume 1 of 4: Integrated Platform Controller Hub
March 2015
17.4.1.20 MD—Message Signaled Interrupt Message Data Register (KT—D22:F3)
Address Offset: DC–DDh Attribute: R/W
Default Value: 0000h Size: 16 bits
This 16-bit field is programmed by system software if MSI is enabled
17.4.2 KT IO/Memory Mapped Device Registers
17.4.2.1 KTRxBR—KT Receive Buffer Register (KT—D22:F3)
Address Offset: 00h Attribute: RO
Default Value: 00h Size: 8 bits
This implements the KT Receiver Data register. Host access to this address, depends on
the state of the DLAB bit (KTLCR[7]). It must be 0 to access the KTRxBR.
RxBR:
Host reads this register when FW provides it the receive data in non-FIFO mode. In
FIFO mode, host reads to this register translate into a read from Intel ME memory (RBR
FIFO).
17.4.2.2 KTTHR—KT Transmit Holding Register (KT—D22:F3)
Address Offset: 00h Attribute: RO
Default Value: 00h Size: 8 bits
This implements the KT Transmit Data register. Host access to this address, depends on
the state of the DLAB bit (KTLCR[7]). It must be 0 to access the KTTHR.
Bit Description
15:0 Data (DATA)— R/W. This MSI data is driven onto the lower word of the data bus of the MSI
memory write transaction.
Table 17-10.KT IO/Memory Mapped Device Register Address Map
Address
Offset
Register
Symbol
Register Name
Default
Value
Attribute
0h KTRxBR KT Receive Buffer Register 00h RO
0h KTTHR KT Transmit Holding Register 00h WO
0h KTDLLR KT Divisor Latch LSB Register 00h R/W
1h KTIER KT Interrupt Enable register 00h R/W, RO
1h KTDLMR KT Divisor Latch MSB Register 00h R/W
2h KTIIR KT Interrupt Identification register 01h RO
2h KTFCR KT FIFO Control register 00h WO
3h KTLCR KT Line Control register 03h R/W
4h KTMCR KT Modem Control register 00h RO, R/W
5h KTLSR KT Line Status register 00h RO
6h KTMSR KT Modem Status register 00h RO
Bit Description
7:0 Receiver Buffer Register (RBR)— RO. Implements the Data register of the Serial Interface. If
the Host does a read, it reads from the Receive Data Buffer.