Datasheet
Intel® Management Engine Subsystem Registers (D22:F[3:0])
566 Intel® Xeon® Processor D-1500 Product Family
Datasheet - Volume 1 of 4: Integrated Platform Controller Hub
March 2015
17.1.1.30 MD—Message Signaled Interrupt Message Data Register
(Intel
®
MEI 1—D22:F0)
Address Offset: 98h–99h Attribute: R/W
Default Value: 0000h Size: 16 bits
17.1.1.31 HIDM—MEI Interrupt Delivery Mode Register (Intel
®
MEI 1—D22:F0)
Address Offset: A0h Attribute: R/W
Default Value: 00h Size: 8 bits
17.1.1.32 HERES—Intel
®
MEI Extend Register Status (Intel
®
MEI 1—D22:F0)
Address Offset: BCh–BFh Attribute: RO
Default Value: 40000000h Size: 32 bits
17.1.1.33 HERX—Intel
®
MEI Extend Register DWX (Intel
®
MEI 1—D22:F0)
Address Offset: HER1: C0h–C3h Attribute: RO
HER2: C4h–C7h
HER3: C8h–CBh
HER4: CCh–CFh
HER5: D0h–D3h
HER6: D4h–D7h
HER7: D8h–DBh
HER8: DCh–DFh
Default Value: 00000000h Size: 32 bits
Bit Description
15:0 Data (DATA) — R/W. This 16-bit field is programmed by system software if MSI is enabled. Its
content is driven during the data phase of the MSI memory write transaction.
Bit Description
7:2 Reserved
1:0 Intel MEI Interrupt Delivery Mode (HIDM) — R/W. These bits control what type of interrupt the
Intel MEI will send the host. They are interpreted as follows:
00 = Generate Legacy or MSI interrupt
01 = Generate SCI
10 = Generate SMI
Bit Description
31 Extend Register Valid (ERV) - RO. Set by firmware after all firmware has been loaded. If ERA field
is SHA-1, the result of the extend operation is in HER:5-1. If ERA field is SHA-256, the result of the
extend operation is in HER:8-1.
30 Extend Feature Present (EFP) - RO. This bit is hardwired to 1 to allow driver software to easily
detect the chipset supports the Extend Register FW measurement feature.
29:4 Reserved
3:0 Extend Register Algorithm (ERA) - RO. This field indicates the hash algorithm used in the FW
measurement extend operations. Encodings are:
0h = SHA-1
2h = SHA-256
Other values = Reserved.
Bit Description
31:0 Extend Register DWX (ERDWX) - RO. Xth DWORD result of the extend operation.
Note: Extend Operation is HER[5:1] if using SHA-1. If using SHA-256 then Extend Operation is
HER[8:1]