Datasheet
Intel® Management Engine Subsystem Registers (D22:F[3:0])
Intel® Xeon® Processor D-1500 Product Family 561
Datasheet - Volume 1 of 4: Integrated Platform Controller Hub
March 2015
17.1.1.14 ME_UMA—Intel
®
Management Engine UMA Register (Intel
®
MEI 1—
D22:F0)
Address Offset: 44h–47h Attribute: RO
Default Value: 80000000h Size: 32 bits
15:12 Error Code: If set to nonzero value the Intel
®
ME firmware has encountered a fatal error and
stopped normal operation.
0 – No Error
1 – Uncategorized Failure – The Intel
®
ME firmware has experienced an uncategorized error.
Further details of the failure can be found in the Extended Status Data.
2 – Disabled – Firmware was disabled on this platform.
3 – Image Failure - The Intel
®
ME firmware stored in the system flash is not valid.
11 Update in Progress: This bit is set if any type of Intel
®
ME firmware update is in progress.
10 Recovery BUP Load Fault: This bit is set when firmware is not able to load recovery bring-up from
the flash. It means that the recovery section in Intel
®
ME region is broken. When this bit set, it may
or may not have the error code shown in bit [15:12]. The reason is because the firmware can load
bring-up from the operational code. The system can get this bit clear only by update of the recovery
section in Intel
®
ME region, or re-flashing the whole Intel
®
ME region on the SPI flash.
9 Init Complete: When this bit is not set firmware is still in initialization phase. When firmware has
fully entered a stable state, this bit is set to 1 and “Current State” field of this register provides the
steady state of the Intel
®
ME subsystem.
8:6 Operating State: This field describes the current operating state of Intel
®
ME.
000 – Preboot
001 – M0 with UMA
010 – Reserved
011 – Reserved
100 – M3 without UMA
101 – M0 without UMA – normal state for Intel
®
SPS firmware
110 – Bring up
111 – M0 without UMA but with error
5 FPT or Factory Defaults Bad: This bit is set when the firmware discovers a bad checksum of
Intel
®
ME region Flash Partition Table (FPT) or Factory Defaults. When this bit set, it may or may not
have the error code shown in bit [15:12]. The system can get this bit clear only by re-flashing the
whole Intel
®
ME region in the SPI flash.
4 Manufacturing Mode: When this bit is set, the platform is still in manufacturing mode. Host can
use this bit to inform user that the platform is NOT READY for production yet. This bit is set as long
as Intel
®
ME Region access is not locked for flash masters other than Intel
®
ME. For shipping
machine, this bit MUST be 0.
3:0 Current State: This field describes the current operation state of the firmware.
0 – Reset – Intel
®
ME is in reset state, will exit this state within 1 milisecond
1 – Initialization – Intel
®
ME is initializing, will exit this state within 2 seconds
2 – Recovery – Intel
®
ME is in recovery mode, check ME1.GMES register to determine cause
3 – Reserved
4 – Disabled – Intel
®
ME functionality has been disabled, it executes idle loop
5 – Operational – Intel
®
ME is in normal operational state
6 – Reserved
7 – State Transition – Intel
®
ME sets this state before starting a transition to a new Operating State.
It is temporary state, may appear on transition between Initialization and Operational.
Bit Description
Bit Description
31 Reserved — RO. Hardwired to 1. Can be used by host software to discover that this register is valid.
30:7 Reserved
16 Intel ME UMA Size Valid—RO. This bit indicates that FW has written to the MUSZ field.
15:6 Reserved