Datasheet

Intel® Management Engine Subsystem Registers (D22:F[3:0])
560 Intel® Xeon® Processor D-1500 Product Family
Datasheet - Volume 1 of 4: Integrated Platform Controller Hub
March 2015
17.1.1.9 SVID—Subsystem Vendor ID Register (Intel
®
MEI 1—D22:F0)
Address Offset: 2Ch–2Dh Attribute: R/WO
Default Value: 0000h Size: 16 bits
17.1.1.10 SID—Subsystem ID Register (Intel
®
MEI 1—D22:F0)
Address Offset: 2Eh–2Fh Attribute: R/WO
Default Value: 0000h Size: 16 bits
17.1.1.11 CAPP—Capabilities List Pointer Register (Intel
®
MEI 1—D22:F0)
Address Offset: 34h Attribute: RO
Default Value: 50h Size: 8 bits
17.1.1.12 INTR—Interrupt Information Register (Intel
®
MEI 1—D22:F0)
Address Offset: 3Ch–3Dh Attribute: R/W, RO
Default Value: 0100h Size: 16 bits
17.1.1.13 HFS— Intel® ME Host Firmware Status Register (Intel
®
MEI 1—
D22:F0)
Address Offset: 40h–43h Attribute: RO
Default Value: 00000000h Size: 32 bits
Bit Description
15:0 Subsystem Vendor ID (SSVID) — R/WO. Indicates the sub-system vendor identifier. This field
should be programmed by BIOS during boot-up. Once written, this register becomes Read Only. This
field can only be cleared by PLTRST#.
Note: Register must be written as a Word write or as a DWord write with SID register.
Bit Description
15:0 Subsystem ID (SSID) — R/WO. Indicates the sub-system identifier. This field should be
programmed by BIOS during boot-up. Once written, this register becomes Read Only. This field can
only be cleared by PLTRST#.
Note: Register must be written as a Word write or as a DWord write with SVID register.
Bit Description
7:0 Capabilities Pointer (PTR) — RO. Indicates that the pointer for the first entry in the capabilities
list is at 50h in configuration space.
Bit Description
15:8 Interrupt Pin (IPIN) — RO. This indicates the interrupt pin the Intel MEI host controller uses. A
value of 1h/2h/3h/4h indicates that this function implements legacy interrupt on INTA/INTB/INTC/
INTD, respectively.
7:0 Interrupt Line (ILINE) — R/W. Software written value to indicate which interrupt line (vector) the
interrupt is connected to. No hardware action is taken on this register.
Bit Description
31:28 BIOS MSG ACK: Acknowledge for register based BIOS message in MEI 1 H_GS Register.
27:25 BIOS MSG ACK Data: Message specific data for acknowledged BIOS message.
24:20 Reserved
19:16 Operating Mode: This field describes the current operating mode of Intel
®
ME.
1:0 – Reserved
2 – Debug Mode
14:3 – Reserved
15 – Intel
®
SPS firmware is running in Intel
®
ME