Datasheet
Intel® Management Engine Subsystem Registers (D22:F[3:0])
Intel® Xeon® Processor D-1500 Product Family 559
Datasheet - Volume 1 of 4: Integrated Platform Controller Hub
March 2015
17.1.1.4 PCISTS—PCI Status Register (Intel
®
MEI 1—D22:F0)
Address Offset: 06h–07h Attribute: RO
Default Value: 0010h Size: 16 bits
17.1.1.5 RID—Revision Identification Register (Intel
®
MEI 1—D22:F0)
Offset Address: 08h Attribute: RO
Default Value: See bit description Size: 8 bits
17.1.1.6 CC—Class Code Register (Intel
®
MEI 1—D22:F0)
Address Offset: 09h–0Bh Attribute: RO
Default Value: 078000h Size: 24 bits
17.1.1.7 HTYPE—Header Type Register (Intel
®
MEI 1—D22:F0)
Address Offset: 0Eh Attribute: RO
Default Value: 80h Size: 8 bits
17.1.1.8 MEI0_MBAR—Intel MEI 1 MMIO Base Address (Intel
®
MEI 1—D22:F0)
Address Offset: 10h–17h Attribute: R/W, RO
Default Value: 0000000000000004h Size: 64 bits
This register allocates space for the MEI0 memory mapped registers.
Bit Description
15:5 Reserved
4 Capabilities List (CL) — RO. Indicates the presence of a capabilities list, hardwired to 1.
3 Interrupt Status (IS) — RO. Indicates the interrupt status of the device.
0 = Interrupt is deasserted.
1 = Interrupt is asserted.
2:0 Reserved
Bit Description
7:0 Revision ID — RO. See the Specification Update for the value of the RID Register.
Bit Description
23:16 Base Class Code (BCC) — RO. Indicates the base class code of the Intel MEI device.
15:8 Sub Class Code (SCC) — RO. Indicates the sub class code of the Intel MEI device.
7:0 Programming Interface (PI) — RO. Indicates the programming interface of the Intel MEI device.
Bit Description
7 Multi-Function Device (MFD) — RO. Indicates the Intel MEI host controller is part of a
multifunction device.
6:0 Header Layout (HL) — RO. Indicates that the Intel MEI uses a target device layout.
Bit Description
63:4 Base Address (BA) — R/W. Software programs this field with the base address of this region.
3 Prefetchable Memory (PM) — RO. Indicates that this range is not pre-fetchable.
2:1 Type (TP) — RO. Set to 10b to indicate that this range can be mapped anywhere in 64-bit address
space.
0 Resource Type Indicator (RTE) — RO. Indicates a request for register memory space.