Datasheet
Thermal Sensor Registers (D31:F6)
548 Intel® Xeon® Processor D-1500 Product Family
Datasheet - Volume 1 of 4: Integrated Platform Controller Hub
March 2015
16.1.10 LT—Latency Timer Register
Address Offset: 0Dh Attribute: RO
Default Value: 00h Size: 8 bits
16.1.11 HTYPE—Header Type Register
Address Offset: 0Eh Attribute: RO
Default Value: 00h Size: 8 bits
16.1.12 TBAR—Thermal Base Register
Address Offset: 10h–13h Attribute: R/W, RO
Default Value: 00000004h Size: 32 bits
This BAR creates 4K bytes of memory space to signify the base address of Thermal
memory mapped configuration registers. This memory space is active when the
Command (CMD) register Memory Space Enable (MSE) bit is set and either
TBAR[31:12] or TBARH are programmed to a non-zero address. This BAR is owned by
the Operating System, and allows the OS to locate the Thermal registers in system
memory space.
16.1.13 TBARH—Thermal Base High DWord Register
Address Offset: 14h–17h Attribute: R/W, RO
Default Value: 00000000h Size: 32 bits
This BAR extension holds the high 32 bits of the 64 bit TBAR. In conjunction with TBAR,
it creates 4 KB of memory space to signify the base address of Thermal memory
mapped configuration registers.
Bit Description
7:0 Latency Timer (LT) — RO. Does not apply to PCI Bus Target-only devices.
Bit Description
7 Multi-Function Device (MFD) — RO. This bit is 0 because a multi-function device only needs to
be marked as such in Function 0, and the Thermal registers are not in Function 0.
6:0 Header Type (HTYPE) — RO. Implements Type 0 Configuration header.
Bit Description
31:12 Thermal Base Address (TBA) — R/W. This field provides the base address for the Thermal logic
memory mapped configuration registers. 4 KB bytes are requested by hardwiring bits 11:4 to 0s.
11:4 Reserved
3 Prefetchable (PREF) — RO. Indicates that this BAR is NOT pre-fetchable.
2:1 Address Range (ADDRNG) — RO. Indicates that this BAR can be located anywhere in 64 bit
address space.
0 Space Type (SPTYP) — RO. Indicates that this BAR is located in memory space.
Bit Description
31:0 Thermal Base Address High (TBAH) — R/W. TBAR bits 61:32.