Datasheet

PCI Express* Configuration Registers
500 Intel® Xeon® Processor D-1500 Product Family
Datasheet - Volume 1 of 4: Integrated Platform Controller Hub
March 2015
13.1.43 MD—Message Signaled Interrupt Message Data Register
(PCI Express*—D28:F0/F1/F2/F3/F4/F5/F6/F7)
Address Offset: 88h–89h Attribute: R/W
Default Value: 0000h Size: 16 bits
13.1.44 SVCAP—Subsystem Vendor Capability Register
(PCI Express*—D28:F0/F1/F2/F3/F4/F5/F6/F7)
Address Offset: 90h–91h Attribute: R/WO, RO
Default Value: A00Dh Size: 16 bits
13.1.45 SVID—Subsystem Vendor Identification Register
(PCI Express*—D28:F0/F1/F2/F3/F4/F5/F6/F7)
Address Offset: 94h–97h Attribute: R/WO
Default Value: 00000000h Size: 32 bits
13.1.46 PMCAP—Power Management Capability Register
(PCI Express*—D28:F0/F1/F2/F3/F4/F5/F6/F7)
Address Offset: A0h–A1h Attribute: RO
Default Value: 0001h Size: 16 bits
Bit Description
15:0 Data (DATA) — R/W. This 16-bit field is programmed by system software if MSI is enabled. Its
content is driven onto the lower word (PCI AD[15:0]) during the data phase of the MSI memory
write transaction.
Bit Description
15:8
Next Capability (NEXT) — R/WO. Indicates the location of the next pointer
in the list. As this register is RWO, BIOS must write a value to this register,
even if it is to re-write the default value.
7:0 Capability Identifier (CID) — RO. Value of 0Dh indicates this is a PCI bridge subsystem vendor
capability.
Bit Description
31:16 Subsystem Identifier (SID) — R/WO. Indicates the subsystem as identified by the vendor. This
field is write once and is locked down until a bridge reset occurs (not the PCI bus reset).
15:0 Subsystem Vendor Identifier (SVID) — R/WO. Indicates the manufacturer of the subsystem.
This field is write once and is locked down until a bridge reset occurs (not the PCI bus reset).
Bit Description
15:8 Next Capability (NEXT) — RO. Indicates this is the last item in the list.
7:0 Capability Identifier (CID) — RO. Value of 01h indicates this is a PCI power management
capability.