Datasheet

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PCI Express* Configuration Registers

Intel® Xeon® Processor D-1500 Product Family 499

Datasheet - Volume 1 of 4: Integrated Platform Controller Hub

March 2015

13.1.39 LSTS2—Link Status 2 Register (PCI Express*—D28:F0/F1/

F2/F3/F4/F5/F6/F7)

Address Offset: 72h–73h Attribute: RO

Default Value: 0000h Size: 16 bits

13.1.40 MID—Message Signaled Interrupt Identifiers Register

(PCI Express*—D28:F0/F1/F2/F3/F4/F5/F6/F7)

Address Offset: 80h–81h Attribute: RO

Default Value: 9005h Size: 16 bits

13.1.41 MC—Message Signaled Interrupt Message Control Register

(PCI Express*—D28:F0/F1/F2/F3/F4/F5/F6/F7)

Address Offset: 82–83h Attribute: R/W, RO

Default Value: 0000h Size: 16 bits

13.1.42 MA—Message Signaled Interrupt Message Address

Address Offset: 84h–87h Attribute: R/W

Default Value: 00000000h Size: 32 bits

Bit Description

15:1 Reserved

0 Current De-emphasis Level (CDL) — RO.

When the Link is operating at 5 GT/s speed, this bit reflects the level of de-emphasis.

Encodings:

0 = -6 dB

1 = -3.5 dB

The value in this bit is undefined when the Link is operating at 2.5 GT/s speed.

Bit Description

15:8 Next Pointer (NEXT) — RO. Indicates the location of the next pointer in the list.

7:0 Capability ID (CID) — RO. Capabilities ID indicates MSI.

Bit Description

15:8 Reserved

7 64 Bit Address Capable (C64) — RO. Capable of generating a 32-bit message only.

6:4 Multiple Message Enable (MME) — R/W. These bits are R/W for software compatibility, but only

one message is ever sent by the root port.

3:1 Multiple Message Capable (MMC) — RO. Only one message is required.

0 MSI Enable (MSIE) — R/W.

0 = MSI is disabled.

1 = MSI is enabled and traditional interrupt pins are not used to generate interrupts.

Note: CMD.BME (D28:F0/F1/F2/F3/F4/F5/F6/F7:04h:bit 2) must be set for an MSI to be

generated. If CMD.BME is cleared, and this bit is set, no interrupts (not even pin based) are

generated.

Bit Description

31:2 Address (ADDR) — R/W. Lower 32 bits of the system specified message address, always DW

aligned.

1:0 Reserved