Datasheet

Functional Description
Intel® Xeon® Processor D-1500 Product Family 49
Datasheet - Volume 1 of 4: Integrated Platform Controller Hub
March 2015
3 Functional Description
This chapter describes the functions and interfaces of Intel® Xeon® Processor D-1500
Product Family.
3.1 PCI-to-PCI Bridge
The PCI-to-PCI bridge resides in PCI. The arbitration for the PCI bus is handled by this
PCI device. The PCI decoder in this device must decode the ranges for the SoC. All
register contents are lost when core well power is removed.
To provide for true isochronous transfers and configurable Quality of Service (QoS)
transactions, Intel® Xeon® Processor D-1500 Product Family supports two virtual
channels VC0 and VC1. These two channels provide a fixed arbitration scheme where
VC1 is always the highest priority. VC0 is always enabled. VC1 must be specifically
enabled and configured in the SoC.
3.1.1 PCI Legacy Mode
PCI functionality is not supported on new generation of Intel® Xeon® Processor D-
1500 Product Family requiring methods such as using PCIe*-to-PCI bridges to enable
external PCI I/O devices. To be able to use PCIe-to-PCI bridges and attached legacy
PCI devices, Intel® Xeon® Processor D-1500 Product Family provides PCI Legacy
Mode. PCI Legacy Mode allows both the PCI Express* root port and PCIe-to-PCI bridge
look like subtractive PCI-to-PCI bridges. This allows the PCI Express root port to
subtractively decode and forward legacy cycles to the bridge, and the PCIe-to-PCI
bridge continues forwarding legacy cycles to downstream PCI devices.
Note: Software must ensure that only one Intel® Xeon® Processor D-1500 Product Family
device is enabled for Subtractive decode at a time.
3.2 PCI Express* Root Ports (D28:F0~F7)
There are eight root ports available in Intel® Xeon® Processor D-1500 Product Family.
The root ports are compliant to the PCI Express 2.0 specification running at 5.0 GT/s.
The ports all reside in Device 28, and take Function 0 – 7. Port 1 is Function 0, Port 2 is
Function 1, Port 3 is Function 2, Port 4 is Function 3, Port 5 is Function 4, Port 6 is
Function 5, Port 7 is Function 6, and Port 8 is Function 7.
Note: This section assumes the default PCI Express Function Number-to-Root Port mapping is
used. Function numbers for a given root port are assignable through the Root Port
Function Number and Hide for PCI Express Root Ports register (RCBA+404h). In
accordance with the PCI Local Bus Specification, all multi-function devices must have a
Function 0 assigned.