Datasheet

ManualsBrandsIntel Manualscomputer componentsGG8067401635553

Intel® Xeon® Processor D-1500 Product Family and System Clocks

Intel® Xeon® Processor D-1500 Product Family 47

Datasheet - Volume 1 of 4: Integrated Platform Controller Hub

March 2015

2.5.1.14 PM2PCIECLK—Power Management 2 PCIe Clock Register

Attribute: R/W

Default Value: 00000098h Size: 32-bit

3:0 CLKRQ# Select for CLKOUT_PCIE0_P/N — R/W. Select version of external input CLKRQ# for

dynamic control of the output CLKOUT_PCIE0_P/N.

0000 = PCIECLKRQ0# controls CLKOUT_PCIE0_P/N (Default)

0001 = PCIECLKRQ1# controls CLKOUT_PCIE0_P/N

0010 = PCIECLKRQ2# controls CLKOUT_PCIE0_P/N

0011 = PCIECLKRQ3# controls CLKOUT_PCIE0_P/N

0100 = PCIECLKRQ4# controls CLKOUT_PCIE0_P/N

0101 = PCIECLKRQ5# controls CLKOUT_PCIE0_P/N

0110 = PCIECLKRQ6# controls CLKOUT_PCIE0_P/N

0111 = PCIECLKRQ7# controls CLKOUT_PCIE0_P/N

1000 = PEG_A_CLKRQ# controls CLKOUT_PCIE0_P/N

1001 = PEG_B_CLKRQ# controls CLKOUT_PCIE0_P/N

1010 – 1111 = RSVD

Bit Description

31:27 Reserved

26 Enable CLKREQ# for CLKOUT_ ITPXDP_P/N — R/W. Enable dynamic control of CLKOUT_

ITPXDP_P/N by the mapped CLKREQ#. This register bit may be updated dynamically.

0 = Disable dynamic control of CLKOUT_ ITPXDP_P/N (Default)

1 = Enable dynamic control of CLKOUT_ ITPXDP_P/N

25 Enable CLKREQ# for CLKOUT_ PEG_B_P/N — R/W. Enable dynamic control of

CLKOUT_PEG_B_P/N by the mapped CLKREQ#. This register bit may be updated dynamically.

0 = Disable dynamic control of CLKOUT_PEG_B_P/N (Default)

1 = Enable dynamic control of CLKOUT_PEG_B_P/N

24 Enable CLKREQ# for CLKOUT_ PEG_A_P/N — R/W. Enable dynamic control of CLKOUT_

PEG_A_P/N by the mapped CLKREQ#. This register bit may be updated dynamically.

0 = Disable dynamic control of CLKOUT_ PEG_A_P/N (Default)

1 = Enable dynamic control of CLKOUT_ PEG_A_P/N

23 Enable CLKREQ# for CLKOUT_ PCIE7_P/N — R/W. Enable dynamic control of CLKOUT_

PCIE7_P/N by the mapped CLKREQ#. This register bit may be updated dynamically.

0 = Disable dynamic control of CLKOUT_ PCIE7_P/N (Default)

1 = Enable dynamic control of CLKOUT_ PCIE7_P/N

22 Enable CLKREQ# for CLKOUT_ PCIE6_P/N — R/W. Enable dynamic control of CLKOUT_

PCIE6_P/N by the mapped CLKREQ#. This register bit may be updated dynamically.

0 = Disable dynamic control of CLKOUT_ PCIE6_P/N (Default)

1 = Enable dynamic control of CLKOUT_ PCIE6_P/N

21 Enable CLKREQ# for CLKOUT_ PCIE5_P/N — R/W. Enable dynamic control of CLKOUT_

PCIE5_P/N by the mapped CLKREQ#. This register bit may be updated dynamically.

0 = Disable dynamic control of CLKOUT_ PCIE5_P/N (Default)

1 = Enable dynamic control of CLKOUT_ PCIE5_P/N

20 Enable CLKREQ# for CLKOUT_ PCIE4_P/N — R/W. Enable dynamic control of CLKOUT_

PCIE4_P/N by the mapped CLKREQ#. This register bit may be updated dynamically.

0 = Disable dynamic control of CLKOUT_ PCIE4_P/N (Default)

1 = Enable dynamic control of CLKOUT_ PCIE4_P/N

19 Enable CLKREQ# for CLKOUT_ PCIE3_P/N — R/W. Enable dynamic control of CLKOUT_

PCIE3_P/N by the mapped CLKREQ#. This register bit may be updated dynamically.

0 = Disable dynamic control of CLKOUT_ PCIE3_P/N (Default)

1 = Enable dynamic control of CLKOUT_ PCIE3_P/N

18 Enable CLKREQ# for CLKOUT_ PCIE2_P/N — R/W. Enable dynamic control of CLKOUT_

PCIE2_P/N by the mapped CLKREQ#. This register bit may be updated dynamically.

0 = Disable dynamic control of CLKOUT_ PCIE2_P/N (Default)

1 = Enable dynamic control of CLKOUT_ PCIE2_P/N