Datasheet

xHCI Controller Registers (D20:F0)
Intel® Xeon® Processor D-1500 Product Family 451
Datasheet - Volume 1 of 4: Integrated Platform Controller Hub
March 2015
8:5 Port Link State (PLS) — R/W. This field is used to power manage the port and reflects its current
link state.
When the port is in the Enabled state, system software may set the link U-state by writing this field.
System software may also write this field to force a Disabled to Disconnected state transition of the
port.
Note: The Port Link State Write Strobe (LWS) shall be set to 1b to write this field.
Notes:
1. This field is undefined if PP = 0.
2. Transitions between different states are not reflected until the transition is complete.
3. This bit is in the Suspend Well.
4 Port Reset (PR) — R/W. When software writes a 1 to this bit (from a 0), the bus reset sequence as
defined in the USB Specification, Revision 2.0 is started. Software writes a 0 to this bit to terminate
the bus reset sequence. Software must keep this bit at a 1 long enough to ensure the reset sequence
completes as specified in the USB Specification, Revision 2.0. USB 3.0 ports shall execute the Hot
Reset sequence as defined in the USB 3.0 Specification. PR remains set until reset signaling is
completed by the root hub.
1 = Port is in Reset.
0 = Port is not in Reset.
Note: This bit is in the Suspend Well.
Bit Description
Write Value Description
0 The link shall transition to a U0 state from any of the U-states.
2 USB 2.0 ports only. The link should transition to the U2 State.
3 The link shall transition to a U3 state from any of the U-states. This action
selectively suspends the device connected to this port. While the Port Link
State = U3, the hub does not propagate downstream-directed traffic to this
port, but the hub will respond to resume signaling from the port.
5 USB 3.0 ports only. If the port is in the Disabled state (PLS = Disabled, PP =
1), then the link shall transition to a RxDetect state and the port shall
transition to the Disconnected state, else ignored.
15 USB 2.0 ports only. If the port is in the U3 state (PLS = U3), then the link
shall remain in the U3 state and the port shall transition to the U3Exit
substate, else ignored.
All other values Ignored
Read Value Definition
0 Link is in the U0 State
1 Link is in the U1 State
2 Link is in the U2 State
3 Link is in the U3 State (Device Suspended)
4 Link is in the Disabled State
5 Link is in the RxDetect State
6 Link is in the Inactive State
7 Link is in the Polling State
8 Link is in the Recovery State
9 Link is in the Hot Reset State
10 Link is in the Compliance Mode State
11 Link is in the Test Mode State
12-14 Reserved
15 Link is in the Resume State