Datasheet

Intel® Xeon® Processor D-1500 Product Family and System Clocks
44 Intel® Xeon® Processor D-1500 Product Family
Datasheet - Volume 1 of 4: Integrated Platform Controller Hub
March 2015
2.5.1.11 ICCCTL—ICC Control Register
Attribute: R/W
Default Value: 00000008h Size: 32-bit
2.5.1.12 PMPCI—33MHz Single Ended Clock Power Management Register
Attribute: R/W
Default Value: 00000000h Size: 32-bit
3:0 Reserved
Bit Description
Bit Description
31:5 Reserved
4 Dynamic Power Management for 96MHz Clock Source MODIV6 — R/W. This field enables
power management for all clocks that use this source to be brought down to the lowest power
state when hardware detects an idle condition.
0 = Power Management is Disabled (Default)
1 = Power Management is Enabled
3Reserved
2 Warm Reset Gating of CLKOUT_DPNS — R/W. This field enabled whether CLKOUT_DPNS is
gated during Warm Reset.
0 = CLKOUT_DPNS is not gated (Default)
1 = CLKOUT_DPNS is gated
1 Warm Reset Gating of CLKOUT_PEGA/PEGB — R/W. This field enabled whether
CLKOUT_PEGA/PEGB are gated during Warm Reset.
0 = CLKOUT_PEGA/PEGB are not gated (Default)
1 = CLKOUT_PEGA/PEGB are gated
0Reserved
Bit Description
31:9 Reserved
8 CLKRUN Control Enable for 33 MHz Single Ended Clocks on CLKOUTFLEX3 — R/W. Controls
the enabling of support for CLKRUN protocol for 33 MHz clocks multiplexed out on CLKOUTFLEX3
pin.
0 = CLKRUN Control is disabled and clock is free running (Default)
1 = CLKRUN Control is enabled and clock output can be turned off
7Reserved
6 CLKRUN Control Enable for 33 MHz Single Ended Clocks on CLKOUTFLEX1 — R/W. Controls
the enabling of support for CLKRUN protocol for 33 MHz clocks multiplexed out on CLKOUTFLEX1
pin.
0 = CLKRUN Control is disabled and clock is free running (Default)
1 = CLKRUN Control is enabled and clock output can be turned off
5Reserved
4 CLKRUN Control Enable for fixed 33 MHz Single Ended Clock Output 4 — R/W. Controls the
enabling of support for CLKRUN protocol for fixed 33 MHz clock outputs.
0 = CLKRUN Control is disabled and clock is free running (Default)
1 = CLKRUN Control is enabled and clock output can be turned off
3 CLKRUN Control Enable for fixed 33 MHz Single Ended Clock Output 3 — R/W. Controls the
enabling of support for CLKRUN protocol for fixed 33 MHz clock outputs.
0 = CLKRUN Control is disabled and clock is free running (Default)
1 = CLKRUN Control is enabled and clock output can be turned off
2 CLKRUN Control Enable for fixed 33 MHz Single Ended Clock Output 2 — R/W. Controls the
enabling of support for CLKRUN protocol for fixed 33 MHz clock outputs.
0 = CLKRUN Control is disabled and clock is free running (Default)
1 = CLKRUN Control is enabled and clock output can be turned off