Datasheet

xHCI Controller Registers (D20:F0)
426 Intel® Xeon® Processor D-1500 Product Family
Datasheet - Volume 1 of 4: Integrated Platform Controller Hub
March 2015
11.2.4 RID—Revision Identification Register (USB xHCI—D20:F0)
Offset Address: 08h Attribute: RO
Default Value: See bit description Size: 8 bits
11.2.5 PI—Programming Interface Register (USB xHCI—D20:F0)
Address Offset: 09h Attribute: RO
Default Value: 30h Size: 8 bits
11.2.6 SCC—Sub Class Code Register (USB xHCI—D20:F0)
Address Offset: 0Ah Attribute: RO
Default Value: 03h Size: 8 bits
11.2.7 BCC—Base Class Code Register (USB xHCI—D20:F0)
Address Offset: 0Bh Attribute: RO
Default Value: 0Ch Size: 8 bits
10:9 DEVSEL# Timing Status (DEVT_STS) — RO. This 2-bit field defines the timing for DEVSEL#
assertion.
8 Master Data Parity Error Detected (DPED) — R/WC.
0 = No data parity error detected on USB read completion packet.
1 = This bit is set by Intel® Xeon® Processor D-1500 Product Family when a data parity error is
detected on a xHC read completion packet on the internal interface to the xHCI host controller
and bit 6 of the Command register is set to 1.
7 Fast Back to Back Capable (FB2BC) — RO. Hardwired to 1.
6 User Definable Features (UDF) — RO. Hardwired to 0.
5 66 MHz Capable (66 MHz _CAP) — RO. Hardwired to 0.
4 Capabilities List (CAP_LIST) — RO. Hardwired to 1 indicating that offset 34h contains a valid
capabilities pointer.
3 Interrupt Status
— RO.
This bit reflects the state of this function’s interrupt at the input of the enable/disable logic.
0 = This bit will be 0 when the interrupt is de-asserted.
1 = This bit is a 1 when the interrupt is asserted.
The value reported in this bit is independent of the value in the Interrupt Enable bit.
2:0 Reserved
Bit Description
Bit Description
7:0 Revision ID — RO. This field indicates the device specific revision identifier.
Bit Description
7:0 Programming Interface — RO. A value of 30h indicates that this USB host controller conforms to
the xHCI Specification.
Bit Description
7:0 Sub Class Code (SCC) — RO.
03h = Universal Serial Bus host controller.
Bit Description
7:0 Base Class Code (BCC) — RO.
0Ch = Serial bus controller.