Datasheet
EHCI Controller Registers (D29:F0)
Intel® Xeon® Processor D-1500 Product Family 421
Datasheet - Volume 1 of 4: Integrated Platform Controller Hub
March 2015
Notes:
1. Software should do Read-Modify-Write operations to this register to preserve the contents of bits not being
modified. This include Reserved bits.
2. To preserve the usage of RESERVED bits in the future, software should always write the same value read
from the bit until it is defined. Reserved bits will always return 0 when read.
10.2.3.2 USBPID—USB PIDs Register
Offset: MEM_BASE + A4h–A7h Attribute: R/W, RO
Default Value: 00000000h Size: 32 bits
Power well: Suspend
This DWord register is used to communicate PID information between the USB debug
driver and the USB debug port. The debug port uses some of these fields to generate
USB packets, and uses other fields to return PID information to the USB debug driver.
11 Reserved
10 IN_USE_CNT — R/W. Set by software to indicate that the port is in use. Cleared by software to
indicate that the port is free and may be used by other software. This bit is cleared after reset.
(This bit has no affect on hardware.)
9:7 EXCEPTION_STS — RO. This field indicates the exception when the ERROR_GOOD#_STS bit is
set. This field should be ignored if the ERROR_GOOD#_STS bit is 0.
000 =No Error. (Default)
Note: This should not be seen since this field should only be checked if there is an error.
0 = 001 =Transaction error: Indicates the USB 2.0 transaction had an error (CRC, bad PID,
timeout, and so on)
0 = 010 =Hardware error. Request was attempted (or in progress) when port was suspended or
reset.
All Other combinations are reserved.
6 ERROR_GOOD#_STS — RO.
0 = Hardware clears this bit to 0 after the proper completion of a read or write. (Default)
1 = Error has occurred. Details on the nature of the error are provided in the Exception field.
5 GO_CNT — R/W.
0 = Hardware clears this bit when hardware sets the DONE_STS bit. (Default)
1 = Causes hardware to perform a read or write request.
Note: Writing a 1 to this bit when it is already set may result in undefined behavior.
4 WRITE_READ#_CNT — R/W. Software clears this bit to indicate that the current request is a
read. Software sets this bit to indicate that the current request is a write.
0 = Read (Default)
1 = Write
3:0 DATA_LEN_CNT — R/W. This field is used to indicate the size of the data to be transferred.
default = 0h.
For write operations, this field is set by software to indicate to the hardware how many bytes of
data in Data Buffer are to be transferred to the console. A value of 0h indicates that a zero-length
packet should be sent. A value of 1–8 indicates 1–8 bytes are to be transferred. Values 9–Fh are
invalid and how hardware behaves if used is undefined.
For read operations, this field is set by hardware to indicate to software how many bytes in Data
Buffer are valid in response to a read operation. A value of 0h indicates that a zero length packet
was returned and the state of Data Buffer is not defined. A value of 1–8 indicates 1–8 bytes were
received. Hardware is not allowed to return values 9–Fh.
The transferring of data always starts with byte 0 in the data area and moves toward byte 7 until
the transfer size is reached.
Bit Description
Bit Description
31:24 Reserved
23:16 RECEIVED_PID_STS[23:16] — RO. Hardware updates this field with the received PID for
transactions in either direction. When the controller is writing data, this field is updated with the
handshake PID that is received from the device. When the host controller is reading data, this field
is updated with the data packet PID (if the device sent data), or the handshake PID (if the device
NAKs the request). This field is valid when the hardware clears the GO_DONE#_CNT bit.