Datasheet

SATA Controller Registers (D31:F5)
Intel® Xeon® Processor D-1500 Product Family 379
Datasheet - Volume 1 of 4: Integrated Platform Controller Hub
March 2015
9.1.23 IDE_CONFIG—IDE I/O Configuration Register (SATA–
D31:F5)
Address Offset: 54h–57h Attribute: R/W
Default Value: 00000000h Size: 32 bits
Note: This register is R/W to maintain software compatibility. These bits have no effect on
hardware.
9.1.24 PID—PCI Power Management Capability Identification
Register (SATA–D31:F5)
Address Offset: 70h–71h Attribute: RO
Default Value: B001h Size: 16 bits
9.1.25 PC—PCI Power Management Capabilities Register (SATA–
D31:F5)
Address Offset: 72h–73h Attribute: RO
Default Value: 4003h Size: 16 bits
Bit Description
31:24 Reserved
23:16 IDE_CONFIG Field 6 — R/W. This field is R/W to maintain software compatibility. This field has no
effect on hardware.
15 Reserved
14 IDE_CONFIG Field 5 — R/W. This field is R/W to maintain software compatibility. This field has no
effect on hardware.
13 Reserved
12 IDE_CONFIG Field 4 — R/W. This field is R/W to maintain software compatibility. This field has no
effect on hardware.
11:8 Reserved
7:4 IDE_CONFIG Field 3 — R/W. This field is R/W to maintain software compatibility. This field has no
effect on hardware.
3 Reserved
2 IDE_CONFIG Field 2 — R/W. This field is R/W to maintain software compatibility. This field has no
effect on hardware.
1 Reserved
0 IDE_CONFIG Field 1 — R/W. This field is R/W to maintain software compatibility. This field has no
effect on hardware.
Bits Description
15:8 Next Capability (NEXT) — RO. When SCC is 01h, this field will be B0h indicating the next item is
FLR Capability Pointer in the list.
7:0 Capability ID (CID) — RO. Indicates that this pointer is a PCI power management.
Bits Description
15:11 PME Support (PME_SUP) — RO. By default with SCC = 01h, the default value of 00000 indicates
no PME support in IDE mode.
10 D2 Support (D2_SUP) — RO. Hardwired to 0. The D2 state is not supported
9 D1 Support (D1_SUP) — RO. Hardwired to 0. The D1 state is not supported
8:6 Auxiliary Current (AUX_CUR) — RO. PME# from D3COLD state is not supported, therefore this field
is 000b.