Datasheet

SATA Controller Registers (D31:F5)
374 Intel® Xeon® Processor D-1500 Product Family
Datasheet - Volume 1 of 4: Integrated Platform Controller Hub
March 2015
9.1.5 RID—Revision Identification Register (SATA—D31:F5)
Offset Address: 08h Attribute: RO
Default Value: See bit description Size: 8 bits
9.1.6 PI—Programming Interface Register (SATA–D31:F5)
Address Offset: 09h Attribute: RO
Default Value: 85h Size: 8 bits
When SCC = 01h
9.1.7 SCC—Sub Class Code Register (SATA–D31:F5)
Address Offset: 0Ah Attribute: RO
Default Value: 01h Size: 8 bits
9.1.8 BCC—Base Class Code Register (SATA–D31:F5SATA–
D31:F5)
Address Offset: 0Bh Attribute: RO
Default Value: 01h Size: 8 bits
Bit Description
7:0 Revision ID — RO. This field indicates the device specific revision identifier.
Bit Description
7 This read-only bit is a 1 to indicate that Intel® Xeon® Processor D-1500 Product Family supports
bus master operation
6:4 Reserved
3 Secondary Mode Native Capable (SNC) — RO. Indicates whether or not the secondary channel
has a fixed mode of operation.
0 = Indicates the mode is fixed and is determined by the (read-only) value of bit 2.
This bit will always return 0.
2 Secondary Mode Native Enable (SNE) — RO.
Determines the mode that the secondary channel is operating in.
1 = Secondary controller operating in native PCI mode.
This bit will always return 1.
1 Primary Mode Native Capable (PNC) — RO. Indicates whether or not the primary channel has a
fixed mode of operation.
0 = Indicates the mode is fixed and is determined by the (read-only) value of bit 0.
This bit will always return 0.
0 Primary Mode Native Enable (PNE) — RO.
Determines the mode that the primary channel is operating in.
1 = Primary controller operating in native PCI mode.
This bit will always return 1.
Bit Description
7:0 Sub Class Code (SCC) — RO.
The value of this field determines whether the controller supports legacy IDE mode.
Bit Description
7:0 Base Class Code (BCC) — RO.
01h = Mass storage device