Datasheet

SATA Controller Registers (D31:F2)
352 Intel® Xeon® Processor D-1500 Product Family
Datasheet - Volume 1 of 4: Integrated Platform Controller Hub
March 2015
28 Supports Mechanical Presence Switch (SMPS) — R/WO. When set to 1, indicates whether
the SATA controller supports mechanical presence switches on its ports for use in Hot-Plug
operations. This value is loaded by platform BIOS prior to OS initialization.
If this bit is set, BIOS must also map the SATAGP pins to the SATA controller through GPIO
space.
27 Supports Staggered Spin-up (SSS) — R/WO. Indicates whether the SATA controller supports
staggered spin-up on its ports, for use in balancing power spikes. This value is loaded by
platform BIOS prior to OS initialization.
0 = Staggered spin-up not supported.
1 = Staggered spin-up supported.
26 Supports Aggressive Link Power Management (SALP) — R/WO.
0 = Software shall treat the PxCMD.ALPE and PxCMD.ASP bits as reserved.
1 = The SATA controller supports auto-generating link requests to the partial or slumber states
when there are no commands to process.
25 Supports Activity LED (SAL) — RO. Indicates that the SATA controller supports a single
output pin (SATALED#) which indicates activity.
24 Supports Command List Override (SCLO) — R/WO. When set to 1, indicates that the
Controller supports the PxCMD.CLO bit and its associated function. When cleared to 0, the
Controller is not capable of clearing the BSY and DRQ bits in the Status register in order to issue
a software reset if these bits are still set from a previous operation.
23:20 Interface Speed Support (ISS) — R/WO. Indicates the maximum speed the SATA controller
can support on its ports.
1h = 1.5 Gb/s; 2h =3 Gb/s; 3h = 6 Gb/s
19 Supports Non-Zero DMA Offsets (SNZO) — RO. Reserved, as per the AHCI Revision 1.3
specification
18 Supports AHCI Mode Only (SAM) — RO. The SATA controller may optionally support AHCI
access mechanism only.
0 = SATA controller supports both IDE and AHCI Modes
1 = SATA controller supports AHCI Mode Only
17:16 Reserved
15 PIO Multiple DRQ Block (PMD) — RO. Hardwired to 1. The SATA controller supports PIO
Multiple DRQ Command Block
14 Slumber State Capable (SSC) — R/WO. When set to 1, the SATA controller supports the
slumber state.
13 Partial State Capable (PSC) — R/WO. When set to 1, the SATA controller supports the partial
state.
12:8 Number of Command Slots (NCS) — RO. Hardwired to 1Fh to indicate support for 32 slots.
7 Command Completion Coalescing Supported (CCCS) — R/WO.
0 = Command Completion Coalescing Not Supported
1 = Command Completion Coalescing Supported
6 Enclosure Management Supported (EMS) — R/WO.
0 = Enclosure Management Not Supported
1 = Enclosure Management Supported
5 Supports External SATA (SXS) — R/WO.
0 = External SATA is not supported on any ports
1 = External SATA is supported on one or more ports
When set, software can examine each SATA port’s Command Register (PxCMD) to determine
which port is routed externally.
4:0 Number of Ports (NPS) — RO. Indicates number of supported ports. The number of ports
indicated in this field may be more than the number of ports indicated in the PI (ABAR + 0Ch)
register.
Bit Description