Datasheet

SATA Controller Registers (D31:F2)
348 Intel® Xeon® Processor D-1500 Product Family
Datasheet - Volume 1 of 4: Integrated Platform Controller Hub
March 2015
8.3.2.1 PxSSTS—Serial ATA Status Register (D31:F2)
Address Offset: Attribute: RO
Default Value: 00000000h Size: 32 bits
SDATA when SINDX.RIDX is 00h. This is a 32-bit register that conveys the current state
of the interface and host. Intel® Xeon® Processor D-1500 Product Family updates it
continuously and asynchronously. When Intel® Xeon® Processor D-1500 Product
Family transmits a COMRESET to the device, this register is updated to its reset values.
8.3.2.2 PxSCTL—Serial ATA Control Register (D31:F2)
Address Offset: Attribute: R/W, RO
Default Value: 00000000h Size: 32 bits
SDATA when SINDX.RIDX is 01h. This is a 32-bit read-write register by which software
controls SATA capabilities. Writes to the SControl register result in an action being
taken by Intel® Xeon® Processor D-1500 Product Family or the interface. Reads from
the register return the last value written to it.
Bit Description
31:12 Reserved
11:8 Interface Power Management (IPM) — RO. Indicates the current interface state:
All other values reserved.
7:4 Current Interface Speed (SPD) — RO. Indicates the negotiated interface communication speed.
All other values reserved
Intel® Xeon® Processor D-1500 Product Family Supports Generation 1 communication rates (1.5
Gb/s), Gen 2 rates
(3.0 Gb/s) and Gen 3 rates (6.0Gb/s)
3:0 Device Detection (DET) — RO. Indicates the interface device detection and Phy state:
All other values reserved.
Value Description
0h Device not present or communication not established
1h Interface in active state
2h Interface in PARTIAL power management state
6h Interface in SLUMBER power management state
Value Description
0h Device not present or communication not established
1h Generation 1 communication rate negotiated
2h Generation 2 communication rate negotiated
3h Generation 3 communication rate negotiated
Value Description
0h No device detected and Phy communication not established
1h Device presence detected but Phy communication not established
3h Device presence detected and Phy communication established
4h Phy in offline mode as a result of the interface being disabled or running in a
BIST loopback mode
Bit Description
31:20 Reserved
19:16 Port Multiplier Port (PMP) — R/W. This field is not used by AHCI.
15:12 Select Power Management (SPM) — R/W. This field is not used by AHCI.