Datasheet

Introduction
26 Intel® Xeon® Processor D-1500 Product Family
Datasheet - Volume 1 of 4: Integrated Platform Controller Hub
March 2015
Chapter 12, “SMBus Controller Registers (D31:F3)” provides a detailed description of
registers that reside in the SMBus controller. This controller resides at Device 31,
Function 3 (D31:F3).
Chapter 13, “PCI Express* Configuration Registers” provides a detailed description of
registers that reside in the PCI Express controller. This controller resides at Device 28,
Functions 0 to 7 (D28:F0-F7).
Chapter 14, “High Precision Event Timer Registers” provides a detailed description of
registers that reside in the multimedia timer memory mapped register space.
Chapter 15, “Serial Peripheral Interface (SPI)” provides a detailed description of
registers that reside in the SPI memory mapped register space.
Chapter 16, “Thermal Sensor Registers (D31:F6)” provides a detailed description of
registers that reside in the thermal sensors PCI configuration space. The registers
reside at Device 31, Function 6 (D31:F6).
Chapter 17, “Intel® Management Engine Subsystem Registers (D22:F[3:0])” provides
a detailed description of registers that reside in the Intel® Management Engine (Intel®
ME) controller. The registers reside at Device 22, Function 0 (D22:F0).
1.2 Overview
Intel® Xeon® Processor D-1500 Product Family provides extensive I/O support.
Functions and capabilities include:
• PCI Express* Base Specification, Revision 2.0 support for up to eight ports with
transfers up to 5 GT/s
• ACPI Power Management Logic Support, Revision 4.0a
• Enhanced DMA controller, interrupt controller, and timer functions
• Integrated Serial ATA host controllers with independent DMA operation on up to six
ports
• xHCI USB controller provides support for up to 4 USB ports, of which four can be
configured as SuperSpeed USB 3.0 ports.
• One legacy EHCI USB controller provides a USB debug port.
• Integrated 10/100/1000 Gigabit Ethernet MAC with System Defense
• System Management Bus (SMBus) Specification, Version 2.0 with additional
support for I
2
C* devices
•Supports Intel
®
Virtualization Technology for Directed I/O (Intel
®
VT-d)
•Supports Intel
®
Trusted Execution Technology (Intel
®
TXT)
• Integrated Clock Controller
• Low Pin Count (LPC) interface
• Firmware Hub (FWH) interface support
• Serial Peripheral Interface (SPI) support
•JTAG Boundary Scan support
Note: See Section 1.3 for details on feature availability.