Datasheet
LPC Interface Bridge Registers (D31:F0)
254 Intel® Xeon® Processor D-1500 Product Family
Datasheet - Volume 1 of 4: Integrated Platform Controller Hub
March 2015
7.1.31 BIOS_SEL2—BIOS Select 2 Register (LPC I/F—D31:F0)
Offset Address: D4h–D5h Attribute: R/W
Default Value: 4567h Size: 16 bits
7.1.32 BIOS_DEC_EN1—BIOS Decode Enable Register (LPC I/F—
D31:F0)
Offset Address: D8h–D9h Attribute: R/W, RO
Default Value: FFCFh Size: 16 bits
15:12 BIOS_D8_IDSEL — R/W. IDSEL for two 512-KB BIOS memory ranges. The IDSEL programmed in
this field addresses the following memory ranges:
FFD8 0000h–FFDF FFFFh
FF98 0000h–FF9F FFFFh
11:8 BIOS_D0_IDSEL — R/W. IDSEL for two 512-KB BIOS memory ranges. The IDSEL programmed in
this field addresses the following memory ranges:
FFD0 0000h–FFD7 FFFFh
FF90 0000h–FF97 FFFFh
7:4 BIOS_C8_IDSEL — R/W. IDSEL for two 512-KB BIOS memory ranges. The IDSEL programmed in
this field addresses the following memory ranges:
FFC8 0000h–FFCF FFFFh
FF88 0000h–FF8F FFFFh
3:0 BIOS_C0_IDSEL — R/W. IDSEL for two 512-KB BIOS memory ranges. The IDSEL programmed in
this field addresses the following memory ranges:
FFC0 0000h–FFC7 FFFFh
FF80 0000h–FF87 FFFFh
Bit Description
Bit Description
15:12 BIOS_70_IDSEL — R/W. IDSEL for two, 1-M BIOS memory ranges. The IDSEL programmed in this
field addresses the following memory ranges:
FF70 0000h–FF7F FFFFh
FF30 0000h–FF3F FFFFh
11:8 BIOS_60_IDSEL — R/W. IDSEL for two, 1-M BIOS memory ranges. The IDSEL programmed in this
field addresses the following memory ranges:
FF60 0000h–FF6F FFFFh
FF20 0000h–FF2F FFFFh
7:4 BIOS_50_IDSEL — R/W. IDSEL for two, 1-M BIOS memory ranges. The IDSEL programmed in this
field addresses the following memory ranges:
FF50 0000h–FF5F FFFFh
FF10 0000h–FF1F FFFFh
3:0 BIOS_40_IDSEL — R/W. IDSEL for two, 1-M BIOS memory ranges. The IDSEL programmed in this
field addresses the following memory ranges:
FF40 0000h–FF4F FFFFh
FF00 0000h–FF0F FFFFh
Bit Description
15 BIOS_F8_EN — RO. This bit enables decoding two 512-KB BIOS memory ranges, and one 128-KB
memory range.
0 = Disable
1 = Enable the following ranges for the BIOS
FFF80000h–FFFFFFFFh
FFB80000h–FFBFFFFFh
14 BIOS_F0_EN — R/W. This bit enables decoding two 512-KB BIOS memory ranges.
0 = Disable.
1 = Enable the following ranges for the BIOS:
FFF00000h–FFF7FFFFh
FFB00000h–FFB7FFFFh










