Datasheet

Gigabit LAN Configuration Registers
Intel® Xeon® Processor D-1500 Product Family 239
Datasheet - Volume 1 of 4: Integrated Platform Controller Hub
March 2015
6.2.7 GBECSR_5400—Gigabit Ethernet Capabilities and Status
Register 5400
Address Offset: MBARA + 5400h Attribute: R/W
Default Value: XXXXXXXXh Size: 32 bits
6.2.8 GBECSR_5404—Gigabit Ethernet Capabilities and Status
Register 5404
Address Offset: MBARA + 5404h Attribute: R/W
Default Value: XXXXXXXXh Size: 32 bits
6.2.9 GBECSR_5800—Gigabit Ethernet Capabilities and Status
Register 5800
Address Offset: MBARA + 5800h Attribute: R/W/SN
Default Value: 00000008h Size: 32 bits
6.2.10 GBECSR_5B54—Gigabit Ethernet Capabilities and Status
Register 5B54
Address Offset: MBARA + 5B54h Attribute: RO
Default Value: 60000040h Size: 32 bits
Bit Description
31:0 Receive Address Low (RAL)— R/W.
The lower 32 bits of the 48 bit Ethernet Address.
Bit Description
31 Address Valid— R/W.
30:16 Reserved
15:0 Receive Address High (RAH)— R/W.
The lower 16 bits of the 48 bit Ethernet Address.
Bit Description
31:1 Reserved
0 Advanced Power Management Enable (APME) — R/W/SN.
1 = APM Wakeup is enabled
0 = APM Wakeup is disabled
Bit Description
31:16 Reserved
15 Firmware Valid Bit (FWVAL) — RO.
1 = Firmware is ready
0 = Firmware is not ready
14:0 Reserved