Datasheet

Gigabit LAN Configuration Registers
228 Intel® Xeon® Processor D-1500 Product Family
Datasheet - Volume 1 of 4: Integrated Platform Controller Hub
March 2015
6.1.5 RID—Revision Identification Register (Gigabit LAN—
D25:F0)
Offset Address: 08h Attribute: RO
Default Value: See bit description Size: 8 bits
6.1.6 CC—Class Code Register (Gigabit LAN—D25:F0)
Address Offset: 09h–0Bh Attribute: RO
Default Value: 020000h Size: 24 bits
6.1.7 CLS—Cache Line Size Register (Gigabit LAN—D25:F0)
Address Offset: 0Ch Attribute: R/W
Default Value: 00h Size: 8 bits
6.1.8 PLT—Primary Latency Timer Register (Gigabit LAN—
D25:F0)
Address Offset: 0Dh Attribute: RO
Default Value: 00h Size: 8 bits
6.1.9 HEADTYP—Header Type Register (Gigabit LAN—D25:F0)
Address Offset: 0Eh Attribute: RO
Default Value: 00h Size: 8 bits
3
Interrupt Status
— RO. Indicates status of Hot-Plug and power management interrupts on the root port
that result in INTx# message generation.
0 = Interrupt is de-asserted.
1 = Interrupt is asserted.
This bit is not set if MSI is enabled. If MSI is not enabled, this bit is set regardless of the state of
PCICMD.Interrupt Disable bit (D25:F0:04h:bit 10).
2:0 Reserved
Bit Description
Bit Description
7:0 Revision ID — RO. This field indicates the device specific revision identifier.
Bit Description
23:0 Class Code— RO. Identifies the device as an Ethernet Adapter.
020000h = Ethernet Adapter.
Bit Description
7:0 Cache Line Size — R/W. This field is implemented by PCI devices as a read write field for legacy
compatibility purposes but has no impact on any device functionality.
Bit Description
7:0 Latency Timer (LT) — RO. Hardwired to 0.
Bit Description
7:0 Header Type (HT) — RO.
00h = Indicates this is a single function device.