Datasheet

22 Intel® Xeon® Processor D-1500 Product Family
Datasheet - Volume 1 of 4: Integrated Platform Controller Hub
March 2015
Platform Controller Hub Features
 PCI Express*
— Up to eight PCI Express root ports
— Supports PCI Express Rev 2.0 running at up
to 5.0 GT/s
— Ports 1-4 and 5-8 can independently be
configured to support multiple port
configurations
— Module based Hot-Plug supported (that is,
ExpressCard*)
— NEW: Latency Tolerance Reporting
— NEW: Optimized Buffer Flush/Fill
 Integrated Serial ATA Host Controller
— Up to six SATA ports
— Data transfer rates supported: 6.0 Gb/s, 3.0
Gb/s, and 1.5 Gb/s on all ports
— Integrated AHCI controller
 Eight TACH signals and one PWM signal
 Platform Environmental Control Interface (PECI)
and Simple Serial Transport (SST) 1.0 Bus
 Integrated Clock Controller
— Full featured platform clocking without need
for a discrete clock chip
— Eight PCIe* 2.0 specification compliant clocks,
four PCIe 3.0 specification compliant clocks,
five 33 MHz PCI clocks, and two Flex Clocks
that can be configured for various frequencies
 System TCO Reduction Circuits
— Timers to generate SMI# and Reset upon
detection of system hang
— Timers to detect improper processor reset
— Supports ability to disable external devices
 JTAG
— Boundary Scan for testing during board
manufacturing
 External Glue Integration
— Integrated Pull-down and Series resistors on
USB
 Enhanced DMA Controller
— Two cascaded 8237 DMA controllers
— Supports LPC DMA
 Firmware Hub I/F supports BIOS Memory size up
to 8 MB
 Low Pin Count (LPC) I/F
— Supports two Master/DMA devices.
— Support for Security Device (Trusted Platform
Module) connected to LPC
 Interrupt Controller
— Supports up to eight legacy interrupt pins
— Supports PCI 2.3 Message Signaled Interrupts
— Two cascaded 8259 with 15 interrupts
— Integrated IO APIC capability with 24
interrupts
— Supports Processor System Bus interrupt
delivery
 USB
— xHCI Host Controller, supports up to four
SuperSpeed USB 3.0 connections and four
USB 2.0 connections
— More flexibility in pairing USB 3.0 and USB 2.0
signals to the same connector
— One EHCI Host Controller, supporting up to
four external USB 2.0 ports
— Support for dynamic power gating and Intel
®
Power Management Framework (PMF)
— Per-Port-Disable Capability
— Includes one USB 2.0 High-speed Debug Ports
— Supports wake-up from sleeping states S1-S4
 Integrated Gigabit LAN Controller
— Connection utilizes PCI Express pins
— Integrated ASF Management Controller
— Network security with System Defense
— Supports IEEE 802.3
— 10/100/1000 Mbps Ethernet Support
— Jumbo Frame Support
 Intel
®
IO Virtualization (Intel
®
VT-d) Support
 Intel
®
Trusted Execution Technology (Intel
®
TXT) Support
 Power Management Logic
— Supports ACPI 4.0a
— ACPI-defined power states (processor driven
C states)
— ACPI Power Management Timer
—SMI# generation
— All registers readable/restorable for proper
resume from 0 V core well suspend states
— Support for APM-based legacy power
management for non-ACPI implementations
 Serial Peripheral Interface (SPI)
— Supports up to two SPI devices
— Supports 20 MHz, 33 MHz, and 50 MHz SPI
devices
— NEW: Supports Quad IO Fast Read, Quad
Output Fast Read, Dual IO Fast Read
— NEW: Support for TPM over SPI with the
addition of SPI_CS2# chip select pin
— NEW: Supports Serial Flash Discoverable
Parameter (SFDP)
— Support up to two different erase granularities
 SMBus
— Interface speeds of up to 100 kbps
— Supports SMBus 2.0 Specification
— Host interface allows processor to
communicate using SMBus
— Slave interface allows an internal or external
microcontroller to access system resources
— Supports most two-wire components that are
also I
2
C* compatible