Datasheet

Chipset Configuration Registers
Intel® Xeon® Processor D-1500 Product Family 219
Datasheet - Volume 1 of 4: Integrated Platform Controller Hub
March 2015
5.1.63 FD—Function Disable Register
Offset Address: 3418–341Bh Attribute: R/W
Default Value: See bit description Size: 32-bit
When disabling a function, only the configuration space is disabled. Software must
ensure that all functionality within a controller that is not desired (such as memory
spaces, I/O spaces, and DMA engines) is disabled prior to disabling the function.
When a function is disabled, software must not attempt to re-enable it. A disabled
function can only be re-enabled by a platform reset.
Bit Description
31:28 Reserved
27 XHCI Disable (XHD) — R/W. Default is 0.
0 = The XHCI controller is enabled.
1 = The XHCI controller is disabled.
26
Reserved
25 Serial ATA Disable 2 (SAD2) — R/W. Default is 0.
0 = The SATA controller #2 (D31:F5) is enabled.
1 = The SATA controller #2 (D31:F5) is disabled.
24 Thermal Sensor Registers Disable (TTD) — R/W. Default is 0.
0 = Thermal Sensor Registers (D31:F6) are enabled.
1 = Thermal Sensor Registers (D31:F6) are disabled.
23 PCI Express* 8 Disable (PE8D) — R/W. Default is 0. When disabled, the link for this port is put
into the “link down” state.
0 = PCI Express* port #8 is enabled.
1 = PCI Express port #8 is disabled.
22 PCI Express 7 Disable (PE7D) — R/W. Default is 0. When disabled, the link for this port is put
into the link down state.
0 = PCI Express port #7 is enabled.
1 = PCI Express port #7 is disabled.
21 PCI Express* 6 Disable (PE6D) — R/W. Default is 0. When disabled, the link for this port is put
into the “link down” state.
0 = PCI Express* port #6 is enabled.
1 = PCI Express port #6 is disabled.
20 PCI Express 5 Disable (PE5D) — R/W. Default is 0. When disabled, the link for this port is put
into the link down state.
0 = PCI Express port #5 is enabled.
1 = PCI Express port #5 is disabled.
19 PCI Express 4 Disable (PE4D) — R/W. Default is 0. When disabled, the link for this port is put
into the “link down” state.
0 = PCI Express port #4 is enabled.
1 = PCI Express port #4 is disabled.
Note: This bit must be set when Port 1 is configured as a x4.
18 PCI Express 3 Disable (PE3D) — R/W. Default is 0. When disabled, the link for this port is put
into the link down state.
0 = PCI Express port #3 is enabled.
1 = PCI Express port #3 is disabled.
Note: This bit must be set when Port 1 is configured as a x4.
17 PCI Express* 2 Disable (PE2D) — R/W. Default is 0. When disabled, the link for this port is put
into the link down state.
0 = PCI Express port #2 is enabled.
1 = PCI Express port #2 is disabled.
Note: This bit must be set when Port 1 is configured as a x4 or a x2.
16 PCI Express 1 Disable (PE1D) — R/W. Default is 0. When disabled, the link for this port is put
into the link down state.
0 = PCI Express port #1 is enabled.
1 = PCI Express port #1 is disabled.
15 EHCI #1 Disable (EHCI1D) — R/W. Default is 0.
0 = The EHCI #1 is enabled.
1 = The EHCI #1 is disabled.