Datasheet

Register and Memory Mapping
182 Intel® Xeon® Processor D-1500 Product Family
Datasheet - Volume 1 of 4: Integrated Platform Controller Hub
March 2015
4 Register and Memory Mapping
Intel® Xeon® Processor D-1500 Product Family contains registers that are located in
the processor I/O space and memory space and sets of PCI configuration registers that
are located in PCI configuration space. This chapter describes Intel® Xeon® Processor
D-1500 Product Family I/O and memory maps at the register-set level. Register access
is also described. Register-level address maps and Individual register bit descriptions
are provided in the following chapters. The following notations and definitions are used
in the register/instruction description chapters.
Note: All Chipset Registers are located in the core well unless otherwise indicated.
RO Read Only. In some cases, if a register is read only, writes to this
register location have no effect. However, in other cases, two
separate registers are located at the same location where a read
accesses one of the registers and a write accesses the other
register. See the I/O and memory map tables for details.
WO Write Only. In some cases, if a register is write only, reads to this
register location have no effect. However, in other cases, two
separate registers are located at the same location where a read
accesses one of the registers and a write accesses the other
register. See the I/O and memory map tables for details.
R/W Read/Write. A register with this attribute can be read and
written.
R/WC Read/Write Clear. A register bit with this attribute can be read
and written. However, a write of 1 clears (sets to 0) the
corresponding bit and a write of 0 has no effect.
R/WO Read/Write-Once. A register bit with this attribute can be
written only once after power up. After the first write, the bit
becomes read only.
R/WL Read/Write Lockable. A register bit with the attribute can be
read at any time but writes may only occur if the associated lock
bit is set to unlock. If the associated lock bit is set to lock, this
register bit becomes RO unless otherwise indicated.
R/WLO Read/Write, Lock-Once. A register bit with this attribute can be
written to the non-locked value multiple times, but to the locked
value only once. After the locked value has been written, the bit
becomes read only.
R/W/SN Read/Write register initial value loaded from NVM.
Reserved The value of reserved bits must never be changed. For details
see Section 4.2.
Default When Intel® Xeon® Processor D-1500 Product Family is reset,
it sets its registers to predetermined default states. It is the
responsibility of the system initialization software to determine
configuration, operating parameters, and optional system
features that are applicable, and to program Intel® Xeon®
Processor D-1500 Product Family registers accordingly.