Datasheet

Functional Description
122 Intel® Xeon® Processor D-1500 Product Family
Datasheet - Volume 1 of 4: Integrated Platform Controller Hub
March 2015
3.15.5 Hot-Plug Operation
Intel® Xeon® Processor D-1500 Product Family supports Hot-Plug Surprise removal
and Insertion Notification. An internal SATA port with a Mechanical Presence Switch can
support PARTIAL and SLUMBER with Hot-Plug Enabled. Software can take advantage of
power savings in the low power states while enabling Hot-Plug operation. Refer to
chapter 7 of the AHCI specification for details.
3.15.6 Function Level Reset Support (FLR)
The SATA Host Controller supports the Function Level Reset (FLR) capability. The FLR
capability can be used in conjunction with Intel
Virtualization Technology. FLR allows an
operating system in a Virtual Machine to have complete control over a device, including
its initialization, without interfering with the rest of the platform. The device provides a
software interface that enables the Operating System to reset the whole device as if a
platform reset was asserted.
3.15.6.1 FLR Steps
3.15.6.1.1 FLR Initialization
1. A FLR is initiated by software writing a ‘1’ to the Initiate FLR bit.
2. All subsequent requests targeting the Function will not be claimed and will be
Master Abort Immediate on the bus. This includes any configuration, I/O or
Memory cycles, however, the Function shall continue to accept completions
targeting the Function.
3.15.6.1.2 FLR Operation
The Function will Reset all configuration, I/O and memory registers of the Function
except those indicated otherwise and reset all internal states of the Function to the
default or initial condition.
3.15.6.1.3 FLR Completion
The Initiate FLR bit is reset (cleared) when the FLR reset is completed. This bit can be
used to indicate to the software that the FLR reset is completed.
Note: From the time Initiate FLR bit is written to 1 software must wait at least 100 ms before
accessing the function.
3.15.7 Power Management Operation
Power management of Intel® Xeon® Processor D-1500 Product Family SATA controller
and ports will cover operations of the host controller and the SATA wire.
3.15.7.1 Power State Mappings
The D0 PCI power management state for device is supported by Intel® Xeon®
Processor D-1500 Product Family SATA controller.
SATA devices may also have multiple power states. From parallel ATA, three device
states are supported through ACPI. They are: