Datasheet

Functional Description
120 Intel® Xeon® Processor D-1500 Product Family
Datasheet - Volume 1 of 4: Integrated Platform Controller Hub
March 2015
The MAP register, Section 9.1.27, provides the ability to share PCI functions. When
sharing is enabled, all decode of I/O is done through the SATA registers. Device 31,
Function 1 (IDE controller) is hidden by software writing to the Function Disable
Register (D31, F0, Offset F2h, bit 1), and its configuration registers are not used.
Intel® Xeon® Processor D-1500 Product Family SATA controllers feature six sets of
interface signals (ports) that can be independently enabled or disabled (they cannot be
tri-stated or driven low). Each interface is supported by an independent DMA controller.
Intel® Xeon® Processor D-1500 Product Family SATA controllers interact with an
attached mass storage device through a register interface that is equivalent to that
presented by a traditional IDE host adapter. The host software follows existing
standards and conventions when accessing the register interface and follows standard
command protocol conventions.
Note: SATA interface transfer rates are independent of UDMA mode settings. SATA interface
transfer rates will operate at the bus’s maximum speed, regardless of the UDMA mode
reported by the SATA device or the system BIOS.
3.15.1 SATA 6 Gb/s Support
Intel® Xeon® Processor D-1500 Product Family supports SATA 6 Gb/s transfers with all
capable SATA devices.
3.15.2 SATA Feature Support
Feature
Intel® Xeon®
Processor D-1500
Product Family
(AHCI/RAID Disabled)
Intel® Xeon®
Processor D-1500
Product Family
(AHCI/RAID
Enabled)
Native Command Queuing (NCQ) N/A Supported
Auto Activate for DMA N/A Supported
Hot-Plug Support N/A Supported
Asynchronous Signal Recovery N/A Supported
6 Gb/s Transfer Rate Supported Supported
ATAPI Asynchronous Notification N/A Supported
Host & Link Initiated Power Management N/A Supported
Staggered Spin-Up Supported Supported
Command Completion Coalescing N/A N/A
External SATA N/A Supported
Feature Description
Native Command Queuing (NCQ) Allows the device to reorder commands for more efficient data transfers
Auto Activate for DMA Collapses a DMA Setup then DMA Activate sequence into a DMA Setup
only
Hot-Plug Support Allows for device detection without power being applied and ability to
connect and disconnect devices without prior notification to the system
Asynchronous Signal Recovery Provides a recovery from a loss of signal or establishing communication
after Hot-Plug
6 Gb/s Transfer Rate Capable of data transfers up to 6 Gb/s
ATAPI Asynchronous Notification A mechanism for a device to send a notification to the host that the device
requires attention