Datasheet

Functional Description
Intel® Xeon® Processor D-1500 Product Family 111
Datasheet - Volume 1 of 4: Integrated Platform Controller Hub
March 2015
A reset in which the host and Intel ME partitions of the platform are reset is called a
Global Reset. During a Global Reset, all Intel® Xeon® Processor D-1500 Product
Family functionality is reset except RTC Power Well backed information and Suspend
well status, configuration, and functional logic for controlling and reporting the reset.
Intel ME and Host power back up after the power
cycle period.
Straight to S5 is another reset type where all power wells that are controlled by the
SLP_S3#, SLP_S4#, and SLP_A# pins, as well as SLP_S5# and SLP_LAN# (if pins are
not configured as GPIOs), are turned off. All Intel® Xeon® Processor D-1500 Product
Family functionality is reset, except RTC Power Well backed information and Suspend
well status, configuration, and functional logic for controlling and reporting the reset.
The host stays there until a valid wake event occurs.
Ta b l e 3- 3 5 shows the various reset triggers.
Table 3-35. Causes of Host and Global Resets (Sheet 1 of 2)
Trigger
Host Reset
without
Power
Cycle
1
Host Reset
with Power
Cycle
2
Global Reset
with Power
Cycle
3
Straight to S5
(Host Stays
there)
Write of 0Eh to CF9h (RST_CNT Register) No Yes No (Note 4)
Write of 06h to CF9h (RST_CNT Register) Yes No No (Note 4)
SYS_RESET# Asserted and CF9h (RST_CNT Register) Bit
3 = 0
Yes No No (Note 4)
SYS_RESET# Asserted and CF9h (RST_CNT Register) Bit
3 = 1
No Yes No (Note 4)
SMBus Slave Message received for Reset with Power Cycle No Yes No (Note 4)
SMBus Slave Message received for Reset without Power
Cycle
Yes No No (Note 4)
SMBus Slave Message received for unconditional Power
Down
No No No Yes
TCO Watchdog Timer reaches zero two times Yes No No (Note 4)
Power Failure: PCH_PWROK signal goes inactive in S0/S1
or DPWROK drops
No No Yes
SYS_PWROK Failure: SYS_PWROK signal goes inactive in
S0/S1
No No Yes
Processor Thermal Trip (THRMTRIP#) causes transition to
S5 and reset asserts
No No No Yes
Intel® Xeon® Processor D-1500 Product Family internal
thermal sensors signals a catastrophic temperature
condition
No No No Yes
Power Button 4 second override causes transition to S5
and reset asserts
No No No Yes
Special shutdown cycle from processor causes CF9h-like
PLTRST# and CF9h (RST_CNT Register) Bit 3 = 1
No Yes No (Note 4)
Special shutdown cycle from processor causes CF9h-like
PLTRST# and CF9h (RST_CNT Register) Bit 3 = 0
Yes No No (Note 4)
Intel
®
Management Engine Triggered Host Reset without
power cycle
Yes No No (Note 4)
Intel Management Engine Triggered Host Reset with
power cycle
No Yes No (Note 4)
Intel Management Engine Triggered Power Button
Override
No No No Yes
Intel Management Engine Watchdog Timer Timeout No No No Yes