Datasheet

Functional Description
Intel® Xeon® Processor D-1500 Product Family 105
Datasheet - Volume 1 of 4: Integrated Platform Controller Hub
March 2015
Notes:
1. The OCW1 register must be read before entering ALT access mode.
2. Bits 5, 3, 1, and 0 return 0.
3.12.8.2 PIC Reserved Bits
Many bits within the PIC are reserved, and must have certain values written in order for
the PIC to operate properly. Therefore, there is no need to return these values in ALT
access mode. When reading PIC registers from 20h and A0h, the reserved bits shall
return the values listed in Tab l e 3- 3 1 .
3.12.8.3 Read Only Registers with Write Paths in ALT Access Mode
The registers described in Tab l e 3- 32 have write paths to them in ALT access mode.
Software restores these values after returning from a powered down state. These
registers must be handled special by software. When in normal mode, writing to the
base address/count register also writes to the current address/count register.
Therefore, the base address/count must be written first, then the part is put into ALT
access mode and the current address/count register is written.
20h 12 1 PIC ICW2 of Master controller D0h 6 1 DMA Chan 4–7 Command
2
2 PIC ICW3 of Master controller 2 DMA Chan 4–7 Request
3 PIC ICW4 of Master controller 3 DMA Chan 4 Mode: Bits(1:0) =
00
4 PIC OCW1 of Master controller
1
4 DMA Chan 5 Mode: Bits(1:0) =
01
5 PIC OCW2 of Master controller 5 DMA Chan 6 Mode: Bits(1:0) =
10
6 PIC OCW3 of Master controller 6 DMA Chan 7 Mode: Bits(1:0) =
11.
7 PIC ICW2 of Slave controller
8 PIC ICW3 of Slave controller
9 PIC ICW4 of Slave controller
10 PIC OCW1 of Slave controller
1
11 PIC OCW2 of Slave controller
12 PIC OCW3 of Slave controller
Table 3-30. Write Only Registers with Read Paths in ALT Access Mode (Sheet 2 of 2)
Restore Data Restore Data
I/O
Addr
# of
Rds
Access Data
I/O
Addr
# of
Rds
Access Data
Table 3-31. PIC Reserved Bits Return Values
PIC Reserved Bits Value Returned
ICW2(2:0) 000
ICW4(7:5) 000
ICW4(3:2) 00
ICW4(0) 0
OCW2(4:3) 00
OCW3(7) 0
OCW3(5) Reflects bit 6
OCW3(4:3) 01