Datasheet

10 Intel® Xeon® Processor D-1500 Product Family
Datasheet - Volume 1 of 4: Integrated Platform Controller Hub
March 2015
8.1.21 INT_PN—Interrupt Pin Register (SATA–D31:F2) .............................................. 331
8.1.22 IDE_TIM—IDE Timing Register (SATA–D31:F2)............................................... 331
8.1.23 SIDETIM—Slave IDE Timing Register (SATA–D31:F2) ...................................... 331
8.1.24 SDMA_CNT—Synchronous DMA Control Register (SATA–D31:F2) ...................... 332
8.1.25 SDMA_TIM—Synchronous DMA Timing Register (SATA–D31:F2)........................ 332
8.1.26 IDE_CONFIG—IDE I/O Configuration Register (SATA–D31:F2) .......................... 332
8.1.27 PID—PCI Power Management Capability Identification Register (SATA–
D31:F2) .................................................................................................... 333
8.1.28 PC—PCI Power Management Capabilities Register (SATA–D31:F2)..................... 333
8.1.29 PMCS—PCI Power Management Control and Status Register (SATA–D31:F2)....... 333
8.1.30 MSICI—Message Signaled Interrupt Capability Identification Register (SATA–
D31:F2) .................................................................................................... 334
8.1.31 MSIMC—Message Signaled Interrupt Message Control Register (SATA–
D31:F2) .................................................................................................... 334
8.1.32 MSIMA— Message Signaled Interrupt Message Address Register (SATA–
D31:F2) .................................................................................................... 335
8.1.33 MSIMD—Message Signaled Interrupt Message Data Register (SATA–D31:F2) ...... 336
8.1.34 MAP—Address Map Register (SATA–D31:F2)................................................... 336
8.1.35 PCS—Port Control and Status Register (SATA–D31:F2) .................................... 337
8.1.36 SCLKCG—SATA Clock Gating Control Register................................................. 338
8.1.37 SGC—SATA General Configuration Register .................................................... 339
8.1.38 SATACR0—SATA Capability Register 0 (SATA–D31:F2)..................................... 339
8.1.39 SATACR1—SATA Capability Register 1 (SATA–D31:F2)..................................... 340
8.1.40 FLRCID—FLR Capability Identification Register (SATA–D31:F2) ......................... 340
8.1.41 FLRCLV—FLR Capability Length and Version Register (SATA–D31:F2) ................ 341
8.1.42 FLRC—FLR Control Register (SATA–D31:F2) ................................................... 341
8.1.43 ATC—APM Trapping Control Register (SATA–D31:F2)....................................... 341
8.1.44 ATS—APM Trapping Status Register (SATA–D31:F2)........................................ 342
8.1.45 SP—Scratch Pad Register (SATA–D31:F2) ...................................................... 342
8.1.46 BFCS—BIST FIS Control/Status Register (SATA–D31:F2).................................. 342
8.1.47 BFTD1—BIST FIS Transmit Data1 Register (SATA–D31:F2) .............................. 344
8.1.48 BFTD2—BIST FIS Transmit Data2 Register (SATA–D31:F2) .............................. 344
8.2 Bus Master IDE I/O Registers (D31:F2) ..................................................................... 344
8.2.1 BMIC[P,S]—Bus Master IDE Command Register (D31:F2)................................. 345
8.2.2 BMIS[P,S]—Bus Master IDE Status Register (D31:F2)...................................... 345
8.2.3 BMID[P,S]—Bus Master IDE Descriptor Table Pointer Register (D31:F2) ............. 346
8.2.4 AIR—AHCI Index Register (D31:F2) .............................................................. 346
8.2.5 AIDR—AHCI Index Data Register (D31:F2)..................................................... 346
8.3 Serial ATA Index/Data Pair Superset Registers ........................................................... 347
8.3.1 SINDX—Serial ATA Index Register (D31:F2) ................................................... 347
8.3.2 SDATA—Serial ATA Data Register (D31:F2) .................................................... 347
8.4 AHCI Registers (D31:F2) ......................................................................................... 350
8.4.1 AHCI Generic Host Control Registers (D31:F2)................................................ 351
8.4.2 Port Registers (D31:F2)............................................................................... 356
9 SATA Controller Registers (D31:F5)............................................................................... 371
9.1 PCI Configuration Registers (SATA–D31:F5)............................................................... 371
9.1.1 VID—Vendor Identification Register (SATA—D31:F5) ....................................... 372
9.1.2 DID—Device Identification Register (SATA—D31:F5) ....................................... 372
9.1.3 PCICMD—PCI Command Register (SATA–D31:F5) ........................................... 372
9.1.4 PCISTS — PCI Status Register (SATA–D31:F5) ............................................... 373
9.1.5 RID—Revision Identification Register (SATA—D31:F5) ..................................... 374
9.1.6 PI—Programming Interface Register (SATA–D31:F5) ....................................... 374
9.1.7 SCC—Sub Class Code Register (SATA–D31:F5) ............................................... 374
9.1.8 BCC—Base Class Code Register (SATA–D31:F5SATA–D31:F5) .......................... 374
9.1.9 PCMD_BAR—Primary Command Block Base Address Register (SATA–D31:F5) ..... 375
9.1.10 PCNL_BAR—Primary Control Block Base Address Register (SATA–D31:F5) .......... 375
9.1.11 SCMD_BAR—Secondary Command Block Base Address Register (SATA
D31:F5) .................................................................................................... 375
9.1.12 SCNL_BAR—Secondary Control Block Base Address Register (SATA D31:F5)....... 375
9.1.13 BAR — Legacy Bus Master Base Address Register (SATA–D31:F5) ..................... 376
9.1.14 SIDPBA — SATA Index/Data Pair Base Address Register (SATA–D31:F5) ............ 376
9.1.15 SVID—Subsystem Vendor Identification Register (SATA–D31:F5) ...................... 377
9.1.16 SID—Subsystem Identification Register (SATA–D31:F5)................................... 377
9.1.17 CAP—Capabilities Pointer Register (SATA–D31:F5) .......................................... 377
9.1.18 INT_LN—Interrupt Line Register (SATA–D31:F5)............................................. 377
9.1.19 INT_PN—Interrupt Pin Register (SATA–D31:F5) .............................................. 377