Guide

Platform Design Checklist
R
Intel
®
852GM Chipset Platform Design Guide 239
14.4. Mobile Intel Pentium 4 Processor-M and Mobile Intel
Celeron Processor
14.4.1. Resistor Recommendations
Pin Name System
Pull-up/Pull-down
Series
Termination
Voltage
Translation
Notes
9
A20M# Point-to-point connection to ICH4-
M.
BR0#
220
Ω pull-up to
VCCP
Point-to-point connection to
GMCH, with resistor placed by
GMCH.
COMP[1:0]
51.1
Ω ± 1% pull-
down to gnd
Resistor placed within 0.5” of
processor pin. Trace should be at
least 25 mils from other traces.
DPSLP# Connects to GMCH and ICH4
FERR#
56
Ω pull-up to
VCCP
Point-to-point connection to ICH4-
M, with resistor placed by ICH4-M.
GTLREF[3:0]
49.9
Ω ± 1% pull-up
to VCCP
100
Ω ± 1% pull-
down to gnd
Voltage divider should be placed
within 0.5” of processor pin. Place
1-µF cap by the resistor divider,
220 pF by the processor pin.
GHI#
300
Ω pull-up to
VCCP
Point-to-point connection to ICH4-
M.
IERR#
56
Ω pull-up to
VCCP
IERR# is a 1.05-V signal. Voltage
translation logic may be required if
used.
INIT#
R1 = 2 k
Ω
R2 = 300
Ω
Rs = 300
Ω
Point-to-point connection to ICH4-
M. Voltage transition circuit is
required if connecting to FWH.
Signal is T-split from the ICH4-M
to FWH.
See Figure 134.
IGNNE# Point-to-point connection to ICH4-
M.
LINT0/INTR Point-to-point connection to ICH4-
M.
LINT1/NMI Point-to-point connection to ICH4-
M.
PROCHOT#
56
Ω pull up to
VCCP
R1 = 1.3 kΩ
R2 = 330
Ω
Rs = 330
Ω
PROCHOT# is a VCCP signal.
This signal is not used on the
CRB. So, voltage translation logic
may be required if used.
If Voltage Translation is
Required: Driver isolation resistor
should be placed at the beginning
of the T-split to the system
receiver. The receiver at the
output of the voltage translation
circuit can be any receiver that
can function properly with the
PROCHOT# signal.
See Figure 135.