Datasheet

Datasheet, Volume 2 9
2.21.27 IRTA_REG—Interrupt Remapping Table Address Register........................ 292
2.21.28 IVA_REG—Invalidate Address Register................................................. 293
2.21.29 IOTLB_REG—IOTLB Invalidate Register................................................ 294
Figures
2-1 System Address Range Example .........................................................................17
2-2 DOS Legacy Address Range................................................................................18
2-3 Main Memory Address Range ..............................................................................20
2-4 PCI Memory Address Range ...............................................................................24
2-5 Case 1 – Less than 4 GB of Physical Memory (no remap)........................................29
2-6 Case 2 – Greater than 4 GB of Physical Memory ....................................................30
2-7 Example – DMI Upstream VC0 Memory Map..........................................................39
2-8 PEG Upstream VC0 Memory Map .........................................................................41
Tables
2-1 Register Attributes and Terminology ....................................................................13
2-2 Register Attribute Modifiers ................................................................................14
2-3 SMM regions.....................................................................................................35
2-4 IGD Frame Buffer Accesses.................................................................................42
2-5 IGD VGA I/O Mapping........................................................................................42
2-6 VGA and MDA I/O Transaction Mapping................................................................43
2-7 PCI Device 0, Function 0 Register Address Map .....................................................46
2-8 PCI Device 1, Function 0–2 Configuration Register Address Map ..............................83
2-9 PCI Device 1, Function 0–2 Extended Configuration Register Address Map............... 125
2-10 PCI Device 2 Configuration Register Address Map ................................................ 130
2-11 Device 2 I/O Register Address Map.................................................................... 142
2-12 PCI Device 6 Register Address Map.................................................................... 143
2-13 PCI Device 6 Extended Configuration Register Address Map .................................. 181
2-14 DMIBAR Register Address Map .......................................................................... 186
2-15 MCHBAR Registers in Memory Controller – Channel 0 Register Address Map ............ 205
2-16 MCHBAR Registers in Memory Controller – Channel 1 Register Address Map ............ 209
2-17 MCHBAR Registers in Memory Controller – Integrated Memory Peripheral Hub......... 213
2-18 MCHBAR Registers in Memory Controller – Common Register Address Map.............. 214
2-19 Memory Controller MMIO Registers Broadcast Group Register Address Map............. 218
2-20 Integrated Graphics VT-d Remapping Engine Register Address Map........................ 220
2-21 PCU MCHBAR Register Address Map................................................................... 255
2-22 PXPEPBAR Register Address Map ....................................................................... 263
2-23 Default PEG/DMI VT-d Remapping Engine Register Address Map............................ 264