Datasheet

PENTIUM® PROCESSOR WITH MMX™ TECHNOLOGY E
12
5/23/97 10:47 AM 24318502.DOC
INTEL CONFIDENTIAL
(until publication date)
Table 1. Pin Cross-Reference by Pin Name (xPGA Package) (Cont’d)
Control
A20M# AK08 BREQ AJ01 HIT# AK06 PRDY AC05
ADS# AJ05 BUSCHK# AL07 HITM# AL05 PWT AL03
ADSC# AM02 CACHE# U03 HLDA AJ03 R/S# AC35
AHOLD V04 CPUTYP Q35 HOLD AB04 RESET AK20
AP AK02 D/C# AK04 IERR# P04 SCYC AL17
APCHK# AE05 D/P# AE35 IGNNE# AA35 SMI# AB34
BE0# AL09 DP0 D36 INIT AA33 SMIACT# AG03
BE1# AK10 DP1 D30 INTR/LINT0 AD34 TCK M34
BE2# AL11 DP2 C25 INV U05 TDI N35
BE3# AK12 DP3 D18 KEN# W05 TDO N33
BE4# AL13 DP4 C07 LOCK# AH04 TMS P34
BE5# AK14 DP5 F06 M/IO# T04 TRST# Q33
BE6# AL15 DP6 F02 NA# Y05 VCC2DET# AL01
BE7# AK16 DP7 N05 NMI/LINT1 AC33 W/R# AM06
BOFF# Z04 EADS# AM04 PCD AG05 WB/WT# AA05
BP2 S03 EWBE# W03 PCHK# AF04
BP3 S05 FERR# Q05 PEN# Z34
BRDY# X04 FLUSH# AN07 PM0/BP0 Q03
BRDYC# Y03 FRCMC#
1
Y35 PM1/BP1 R04
APIC Clock Control
Dual Processor
Private Interface
PICCLK H34
(2)
CLK AK18
(2)
PBGNT# AD04
PICD0 J33 [BF0] Y33 PBREQ# AE03
[DPEN#] [BF1] X34 PHIT# AA03
PICD1 L35 STPCLK# V34 PHITM# AC03
[APICEN]
V
CC2
A17 A07 Q01 AA01 AN11
A15 G01 S01 AC01 AN13
A13 J01 U01 AE01 AN15
A11 L01 W01 AG01 AN17
A09 N01 Y01 AN09 AN19