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• Powering Up the Evaluation Board on page 10

• Evaluation Kit Description on page 4

4.11.2 Power Tree

Figure 12. Intel Cyclone 10 LP FPGA Evaluation Board Power Tree

EN5339QI (U23)

3 A Maximum

C10_VCCIO_3.3V

VCC_3.3V

EN5329QI (U25)

2 A Maximum

C10_VCCINT

VCC_1.2V

EN5358HUI (U26)

0.6 A Maximum

C10_VCCIO_1.8V

VCC_1.8V

EN5358HUI (U27)

0.6 A Maximum

C10_VCCA

VCC_3.3V

C10_VCCD_PLL

VCC_5V

USB_5V (1 A)

5V_DCIN (>1 A)

No special power up or down sequence control is required, because the Intel Cyclone

10 LP FPGA can be powered up and down in any sequence.

4.11.3 Current Measurement

To demonstrate low power feature, Intel Cyclone 10 LP FPGA power rails are isolated

with resistors for voltage drop measurement either manually or automatically.

VCCINT, VCCA and VCCIO_3.3V supports automatic current measurement. The

voltage drop across sense resistors are connected to Intel MAX 10 integrated ADC with

current sense amplifiers. Refer to the figure below.

The selected Intel MAX 10 10M08SA-U169 contains one ADC with 9 analog input

channels. Three channels are used for Intel Cyclone 10 LP FPGA current measurement

and six channels are used for Arduino analog.

4 Evaluation Board Components

UG-20082 | 2018.02.05

Intel

Cyclone

10 LP FPGA Evaluation Kit User Guide

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