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Data Sheet

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Board Reference Type Description
U26, U27 Power Regulator Enpirion EP5358HUI, 600 mA
PowerSoC DC-DC step-down
converters with integrated inductor.
U14 Gigabit Ethernet PHY Intel XWAY PHY11G Single Port Gigabit
Ethernet PHY (10/100/1000 Mbps)
PEF7071
Configuration and Setup Elements
J17 Embedded Intel FPGA Download Cable
II
Type-B Mini USB Connector for
programming and debugging the FPGA
J2 10-pin header Optional JTAG direct through 10-pin
header for external download cables
SW1.4 Virtual JTAG TAP Bypass Switch ON/Closed/0: Bypass Virtual JTAG TAP
OFF/Open/1: Enable Virtual JTAG TAP
S1
FPGA nCONFIG push button
Press this button to trigger
reconfiguration
S2 FPGA reset push button Press this button to reset all registers
in the FPGA
Status Elements
D4 Power LED (Blue)
Power Good LED (Detects VCC_3.3V
and VCC_1.2V)
ON: Detected Power is Good
OFF: Detected Power is Bad
D5 Configuration LED (Yellow) Config done status Indicator
ON: FPGA configured successfully
OFF: FPGA not configured
D10 Ethernet LED0 (Green) Ethernet link status indicator
ON: Link-up
OFF: Link-down
Blink: Link-up with traffic
D11 Ethernet LED1 (Green) Ethernet link speed indicator
ON: 100 Mbps
OFF: 10/1000 Mbps or Link-down
D12 Ethernet LED2 (Green) Ethernet link speed indicator
ON: 1000 Mbps
OFF: 10/1000 Mbps or Link-down
Clock Circuits
U20 50 MHz Oscillator 50 MHz crystal oscillator for general
purpose logic of Intel Cyclone 10 LP
FPGA and Intel MAX 10 FPGA devices
U31 Programmable clock generator Three channel Programmable clock
generator. Default frequencies are 125
MHz, 100 MHz and 50 MHz
General User Input/Output
S3, S4, S5, S6 General user push buttons Four user push buttons. Driven low
when pressed.
D6, D7, D8, D9 User LEDs Four user LEDs. Illuminates when
driven low.
continued...
4 Evaluation Board Components
UG-20082 | 2018.02.05
Intel
®
Cyclone
®
10 LP FPGA Evaluation Kit User Guide
15
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