Vol 1
Intel® Xeon® Product 2800/4800/8800 v2 Product Family 167
Datasheet Volume One, February 2014
PIROM
9.1.2 Scratch EEPROM
Also available in the memory component on the processor SMBus is an EEPROM which
may be used for other data at the system or processor vendor’s discretion. The data in
this EEPROM, once programmed, can be write-protected by asserting the active-high
SM_WP signal. This signal has a weak pull-down (10 kΩ) to allow the EEPROM to be
programmed in systems with no implementation of this signal. The Scratch EEPROM
resides in the upper half of the memory component (addresses 80 - FFh). The lower
half comprises the Processor Information ROM (addresses 00 - 7Fh), which is
permanently write-protected by Intel.
9.1.3 PIROM and Scratch EEPROM Supported SMBus
Transactions
The PIROM responds to two SMBus packet types: Read Byte and Write Byte. However,
since the PIROM is write-protected, it will acknowledge a Write Byte command but
ignore the data. The Scratch EEPROM responds to Read Byte and Write Byte
commands. Table 9-1 illustrates the Read Byte command. Table 9-2 illustrates the
Write Byte command.
In the tables, ‘S’ represents a SMBus start bit, ‘P’ represents a stop bit, ‘A’ represents
an acknowledge (ACK), and ‘///’ represents a negative acknowledge (NACK). The
shaded bits are transmitted by the PIROM or Scratch EEPROM, and the bits that aren’t
shaded are transmitted by the SMBus host controller. In the tables, the data addresses
indicate 8 bits.
The SMBus host controller should transmit 8 bits with the most significant bit indicating
which section of the EEPROM is to be addressed: the PIROM (MSB = 0) or the Scratch
EEPROM (MSB = 1).
76h 8 Static Checksum 1 byte checksum Add up by byte and take 2’s
complement.
Other
77-7Eh 64 Electronic Signature Coded binary N/A
7Fh 8 Electronic Signature Checksum 1 byte checksum Add up by byte and take 2’s
complement.
1. Uses Binary Coded Decimal (BCD) translation.
Offset/
Section
# of
Bits
Function Notes Examples
Table 9-1. Read Byte SMBus Packet
S
Slave
Address
Write A
Command
Code
AS
Slave
Address
Read A Data /// P
17-bits 1
18-bits 117-bits 11 8-bits 1 1
Table 9-2. Write Byte SMBus Packet
S
Slave
Address
Write A
Command
Code
AData AP
17-bits 1
18-bits 18-bits 11