Datasheet

Dual-Core Intel
®
Xeon
®
Processor 7000 Series Datasheet 5
Figures
2-1 On-Die Front Side Bus Termination ....................................................................15
2-2 Phase Lock Loop (PLL) Filter Requirements ......................................................17
2-3 Dual-Core Intel
®
Xeon
®
Processor 7000 SeriesLoad
Current vs. Time..................................................................................................26
2-4 VCC Static and Transient Tolerance...................................................................28
2-5 V
CC
Overshoot Example Waveform....................................................................29
3-1 Processor Package Assembly Sketch.................................................................33
3-2 Processor Package Drawing (Sheet 1 of 2) ........................................................34
3-3 Processor Package Drawing (Sheet 2 of 2) ........................................................35
3-4 Processor Topside Markings...............................................................................38
3-5 Processor Bottom-Side Markings........................................................................38
3-6 Processor Pin-Out Coordinates, Top View..........................................................39
3-7 Processor Pin-Out Coordinates, Bottom View ....................................................40
6-1 Dual-Core Intel
®
Xeon
®
Processor 7000 Series Thermal Profile A ....................69
6-2 Case Temperature (TCASE) Measurement Location .........................................70
7-1 Stop Clock State Machine ...................................................................................74
7-2 Logical Schematic of SMBus Circuitry ................................................................77
8-1 Passive Dual-Core Intel
®
Xeon
®
Processor 7000 Series
Thermal Solution (3U and Larger).......................................................................97
8-2 Top Side Board Keepout Zones (Part 1).............................................................99
8-3 Top Side Board Keepout Zones (Part 2)...........................................................100
8-4 Bottom Side Board Keepout Zones...................................................................101
8-5 Board Mounting-Hole Keepout Zones...............................................................102
8-6 Thermal Solution Volumetric .............................................................................103
8-7 Recommended Processor Layout and Pitch.....................................................104
Tables
1-1 Features of the Dual-Core Intel
®
Xeon
®
Processor 7000 Series........................12
2-1 Core Frequency to Front Side Bus Multiplier Configuration ................................16
2-2 BSEL[1:0] Frequency Table for BCLK[1:0]..........................................................16
2-3 Voltage Identification (VID) Definition..................................................................19
2-4 Front Side Bus Pin Groups..................................................................................21
2-5 Signal Description Table .....................................................................................22
2-6 Signal Reference Voltages..................................................................................22
2-7 Processor Absolute Maximum Ratings ...............................................................23
2-8 Voltage and Current Specifications.....................................................................24
2-9 VCC Static and Transient Tolerance...................................................................27
2-10 V
CC
Overshoot Specifications .............................................................................28
2-11 Front Side Bus Differential BCLK Specifications.................................................29
2-12 BSEL[1:0], VID[5:0], and DC Specifications........................................................30
2-13 VIDPWRGD DC Specifications ...........................................................................30
2-14 AGTL+ Signal Group DC Specifications .............................................................30
2-15 PWRGOOD Input and TAP Signal Group DC Specifications..............................30