Laptop User Manual

Dual-Core Intel
®
Xeon
®
processor LV with Intel
®
E7520 Chipset and Intel
®
6300ESB ICH
April 2007 User’s Manual
Order Number: 311274-009 35
Dual-Core Intel Xeon processor LV / E7520 Chipset / 6300ESB ICH
3.3.14 VRD VID Headers
VID headers provide for manual control of the processor core voltage regulator output
level(s). Normally, the processor should be run at its default VID (voltage
identification) value as set during manufacturing. However, in the event the user needs
to set a different VID value from the default value, it can be accomplished through a
jumper block found on the board.
Note: These headers are not populated by default. EmVRD11 Controller VID input 0 and 7 are
tied low. Initial boards will not have the VID Header populated, CPU1 must have VID
override enabled for the initial Dual-Core Intel Xeon processor LV samples. The, VID
Figure 20. IRQ Routing Diagram
ICH
A
B
C
D
E
F
G
H
A
B
C
D
A B C D A
PIRQPXIRQ
IDSEL: AD16
REQ/GNT: 0
PCI Slot
IDSEL: AD17
REQ/GNT: 1
Video
A B C D
IDSEL: AD17
REQ/GNT: 0
PCI-X Slot
A B C D
IDSEL: AD18
REQ/GNT: 1
PCI-X Slot
PCI-X 64/66 PCI 32/33
SERIRQ
SIO
MCH
CPU0
NMISMI
SMI NMI
PCI-E
8x
FSB
PCI-E PCI-E
MSI
PCI-E
8x
HI
HI PCI-E
MSI
MSI
MSI
MSI MSI
PCI-E
MSI
CPU0
SMI NMI
FSB
MSIMSI
SMI
NMI
IRQ14/15
IDE
MSI
PCI-E
8x