Specification Update

Errata
42 Intel
®
Xeon
®
Processor E7 v2 Product Family
Specification Update January 2015
CF90 Virtual-APIC Page Accesses with 32-Bit PAE Paging May Cause a
System Crash
Problem: If a logical processor has EPT (Extended Page Tables) enabled, is using 32-bit PAE
paging, and accesses the virtual-APIC page then a complex sequence of internal
processor micro-architectural events may cause an incorrect address translation or
machine check on either logical processor.
Implication: This erratum may result in unexpected faults, an uncorrectable TLB error logged in
IA32_MC2_STATUS.MCACOD (bits [15:0]) with a value of 0000_0000_0001_xxxxb
(where x stands for 0 or 1), a guest or hypervisor crash, or other unpredictable
system behavior.
Workaround: It is possible for the BIOS to contain a workaround for this erratum.
Status: For the affected steppings, see the “Summary Table of Changes”.
CF91 IA32_FEATURE_CONTROL MSR May be Un-Initialized on a Cold Reset
Problem: IA32_FEATURE_CONTROL MSR (3Ah) may have random values after RESET (including
the reserved and Lock bits), and the read-modify-write of the reserved bits and/or the
Lock bit being incorrectly set may cause an unexpected GP fault.
Implication: Due to this erratum, an unexpected GP fault may occur and BIOS may not
complete initialization.
Workaround: It is possible for the BIOS to contain a workaround for this erratum.
Status: For the affected steppings, see the “Summary Table of Changes”.
CF92 PEBS May Unexpectedly Signal a PMI After the PEBS Buffer is Full
Problem: The Software Developer’s Manual states that no PMI should be generated when PEBS
index reaches PEBS Absolute Maximum. Due to this erratum a PMI may be generated
even though the PEBS buffer is full.
Implication: PEBS may trigger a PMI even though the PEBS index has reached the PEBS
Absolute Maximum.
Workaround: None identified.
Status: For the affected steppings, see the “Summary Table of Changes”.
CF93 Execution of GETSEC[SEXIT] May Cause a Debug Exception to Be Lost
Problem: A debug exception occurring at the same time that GETSEC[SEXIT] is executed or
when an SEXIT doorbell event is serviced may be lost.
Implication: Due to this erratum, there may be a loss of a debug exception when it happens
concurrently with the execution of GETSEC[SEXIT]. Intel has not observed this erratum
with any commercially available software.
Workaround: None identified.
Status: For the affected steppings, see the “Summary Table of Changes”.
CF94 An Uncorrectable Error Logged in IA32_MC2_STATUS May also Result
in a System Hang
Problem: Uncorrectable errors logged in IA32_MC2_STATUS MSR (409H) may also result in a
system hang causing an Internal Timer Error (MCACOD = 0x0400h) to be logged in
another machine check bank (IA32_MCi_STATUS).
Implication: Uncorrectable errors logged in IA32_MC2_STATUS can further cause a system hang
and an Internal Timer Error to be logged.
Workaround: None identified.
Status: For the affected steppings, see the “Summary Table of Changes”.