Datasheet

Datasheet 115
DRAM Controller Registers (D0:F0)
5.2.20 C1DRB3—Channel 1 DRAM Rank Boundary Address 3
B/D/F/Type: 0/0/0/MCHBAR
Address Offset: 606–607h
Default Value: 0000h
Access: RW/L, RO
Size: 16 bits
The operation of this register is detailed in the description for C0DRB0 register.
5.2.21 C1DRA01—Channel 1 DRAM Rank 0,1 Attributes
B/D/F/Type: 0/0/0/MCHBAR
Address Offset: 608–609h
Default Value: 0000h
Access: RW/L
Size: 16 bits
The operation of this register is detailed in the description for C0DRA01 register.
5.2.22 C1DRA23—Channel 1 DRAM Rank 2,3 Attributes
B/D/F/Type: 0/0/0/MCHBAR
Address Offset: 60A–60Bh
Default Value: 0000h
Access: RW/L
Size: 16 bits
The operation of this register is detailed in the description for C0DRA01 register.
Bit Access
Default
Value
Description
15:10 RO 000000b Reserved
9:0 RW/L 000h
Channel 1 DRAM Rank Boundary Address 3 (C1DRBA3): See C0DRB3
register.
In stacked mode, this will be cumulative of Ch0 DRB3.
This register is locked by ME stolen Memory lock.
Bit Access
Default
Value
Description
15:8 RW/L 00h
Channel 1 DRAM Rank-1 Attributes (C1DRA1): See C0DRA1 register.
This register is locked by ME stolen Memory lock.
7:0 RW/L 00h
Channel 1 DRAM Rank-0 Attributes (C1DRA0): See C0DRA0 register.
This register is locked by ME stolen Memory lock.
Bit Access
Default
Value
Description
15:8 RW/L 00h
Channel 1 DRAM Rank-3 Attributes (C1DRA3): See C0DRA3 register.
This register is locked by ME stolen Memory lock.
7:0 RW/L 00h
Channel 1 DRAM Rank-2 Attributes (C1DRA2): See C0DRA2 register.
This register is locked by ME stolen Memory lock.