Vol 1

Intel® Xeon® Processor E7-8800/4800/2800 v2 Product Family 13
Datasheet Volume One, February 2014
Overview
1.1.1 Processor Feature Details
Each core supports two threads (Intel® Hyper-Threading Technology), up to 30
threads per socket
46-bit physical addressing and 48-bit virtual addressing
A 32-KB instruction and 32-KB data first-level cache (L1) for each core
A 256-KB shared instruction/data mid-level (L2) cache for each core
Up to 37.5 MB last level cache (LLC): up to 2.5 MB per core instruction/data last
level cache (LLC), shared among all cores
The Intel® Xeon® E7 v2 processor supports Directory Mode to reduce
unnecessary Intel QuickPath Interconnect traffic by tracking cache lines
present in remote sockets.
1.1.2 Supported Technologies
Intel® Virtualization Technology (Intel® VT)
Intel® Virtualization Technology for Directed I/O (Intel® VT-d)
Intel® Trusted Execution Technology (Intel® TXT)
Intel® 64 Architecture
Intel® Streaming SIMD Extensions 4.1 (Intel® SSE4.1)
Intel® Streaming SIMD Extensions 4.2 (Intel® SSE4.2)
Figure 1-3. Intel® Xeon® E7 v2 Processor on a 8 Socket Platform