Specification Update

Errata
Intel
®
Xeon
®
Processor E7 v2 Product Family 23
Specification Update January 2015
report that status, but rather report the normal “Waiting for Physical Layer Ready”
(0000b).
Implication: There is no known problem with this behavior since there is no usage model that relies
on polling of the link_init_status state in the “Waiting for Physical Layer Ready” versus
“Internal Stall Link Initialization” state, and it only advertises the “Internal Stall Link
Initialization” state for a brief period of time during Link Layer Initialization.
Workaround: None identified.
Status: For the affected steppings, see the “Summary Table of Changes”.
CF17 The Processor Does Not Detect Intel
®
QPI RSVD_CHK Field Violations.
Problem: According to the Intel
®
QPI specification, if a target agent receives a packet with a
nonzero RSVD_CHK field, it should flag it as an “Intel QPI Link Layer detected
unsupported/undefined” packet. Due to this erratum, the processor does not check the
RSVD_CHK field nor report the expected error.
Implication: The processor will not flag the “Intel QPI Link Layer detected unsupported/undefined”
packet error in the case that the RSVD_CHK field is nonzero.
Workaround: None identified.
Status: For the affected steppings, see the “Summary Table of Changes”.
CF18 Intel
®
QuickData Technology DMA Non-Page-Aligned Next Source/
Destination Addresses May Result in Unpredictable System Behavior.
Problem: Non-page aligned Intel
®
QuickData Technology DMA next source/destination addresses
may cause memory read-write collisions.
Implication: Due to this erratum, using non-page aligned next source/destination addresses may
result in unpredictable system behavior.
Workaround: Next source/destination addresses must be page aligned. The Intel-provided
Intel
®
QuickData Technology DMA driver abides by this alignment rule.
Status: For the affected steppings, see the “Summary Table of Changes”.
CF19 Intel
®
QPI May Report a Reserved Value in The Link Initialization
Status Field During Link Training.
Problem: An Intel
®
QuickPath Interconnect (Intel
®
QPI) link reports its Link Training progress in
the Intel
®
QPI Link Status register. Due to this erratum, the Link Initialization Status
(QPILS Bus 1;Device 8, 9, 24; Function 0; Offset 48H; bits [27:24]) incorrectly reports
a reserved encoding of 1101b while in the “Initial Credit return (initializing credits)”
state. The correct encoding for the “Initial Credit return (initializing credits)” state is
0101b.
Implication: Software that monitors the Link Initialization Status field during Link Training may see a
reserved encoding reported.
Workaround: None identified. Software may ignore or reinterpret the incorrect encoding for this
processor.
Status: For the affected steppings, see the “Summary Table of Changes”.
CF20 Enabling Opportunistic Self-Refresh and Pkg C2 State Can Severely
Degrade PCIe* Bandwidth.
Problem: Due to this erratum, enabling opportunistic self-refresh can lead to the memory
controller over-aggressively transitioning DRAM to self-refresh mode when the
processor is in Pkg C2 state.
Implication: The PCIe* interface peak bandwidth can be degraded by as much as 90%
Workaround: A BIOS workaround has been identified.
Status: For the affected steppings, see the “Summary Table of Changes”.