Vol 1

Signal Descriptions
66 Intel® Xeon® Product 2800/4800/8800 v2 Product Family
Datasheet Volume One, February 2014
5.10 Processor Asynchronous Sideband and
Miscellaneous Signals
Table 5-10. Processor Asynchronous Sideband Signals (Sheet 1 of 2)
Signal Name Description
CAT_ERR_N Indicates that the system has experienced a fatal or catastrophic error and cannot
continue to operate. The processor will assert CAT_ERR_N for nonrecoverable
machine check errors and other internal unrecoverable errors. It is expected that
every processor in the system will wire-OR CAT_ERR_N for all processors. Since
this is an I/O land, external agents are allowed to assert this land which will cause
the processor to take a machine check exception.
On Intel® Xeon® E7v2 processors, CAT_ERR_N is used for signaling the following
types of errors:
— Legacy MCERR’s, CAT_ERR_N is asserted for 16 BCLKs, and samples it
for 28 BCLKs to determine if it is driven by an external agent indicating a
fatal or uncorrected error.
— Legacy IERR’s, CAT_ERR_N remains asserted until warm or cold reset.
ERROR_N[2:0] Error status signals for integrated I/O (IIO) unit:
• 0 = Hardware correctable error (no operating system or firmware action
necessary)
• 1 = Non-fatal error (operating system or firmware action required to contain
and recover)
• 2 = Fatal error (system reset likely required to recover)
MEM_HOT_C01_N
MEM_HOT_C23_N
Memory throttle control. MEM_HOT_C01_N and MEM_HOT_C23_N signals have two
modes of operation – input and output mode.
Input mode is externally asserted and is used to detect external events such as
VR_HOT# from the memory voltage regulator and causes the processor to throttle
the appropriate memory channels.
Output mode is asserted by the processor and has two modes - level mode and
duty cycle mode. In level mode, the output indicates that a particular branch of
memory subsystem is hot. In duty cycle mode, the output indicates the hottest
DIMM’s temperature by altering the percentage of assertion (duty cycle).
MEM_HOT_C01_N is used for memory channels 0 & 1 while MEM_HOT_C23_N is
used for memory channels 2 & 3.
PMSYNC Power Management Sync. A sideband signal to communicate power management
status from the Platform Controller Hub (PCH) to the processor. Sourced from VTT.
PROCHOT_N PROCHOT_N will go active when the processor temperature monitoring sensor
detects that the processor has reached its maximum safe operating temperature.
This indicates that the processor Thermal Control Circuit has been activated, if
enabled. This signal can also be driven to the processor to activate the Thermal
Control Circuit.
If PROCHOT_N is asserted at the deassertion of RESET_N, the processor will
tristate its outputs.
PWRGOOD Power good input signal used to indicate that the VCC power supply is stable. The
processor requires this signal to be a clean indication that all processor clocks and
power supplies are stable and within their specifications.
“Clean” implies that the signal will remain low (capable of sinking leakage current),
without glitches, from the time that the power supplies are turned on until they
come within specification. The signal must then transition monotonically to a high
state. PWRGOOD can be driven inactive at any time, but clocks and power must
again be stable before a subsequent rising edge of PWRGOOD. The signal must be
supplied to the processor; it is used to protect internal circuits against voltage
sequencing issues. It should be driven high throughout boundary scan operation.
RESET_N Asserting the RESET_N signal resets the processor to a known state and invalidates
its internal caches without writing back any of their contents. Note some PLL, Intel
QuickPath Interconnect and error states are not effected by reset and only
PWRGOOD forces them to a known state.
SAFE_MODE_BOOT