Vol 1

Intel® Xeon® Product 2800/4800/8800 v2 Product Family 177
Datasheet Volume One, February 2014
PIROM
9.3.3.8 VTL: Core Voltage Tolerance, Low
This location contains the maximum Core Voltage Tolerance DC offset low. This field,
rounded to the next thousandth, is in mV and is reflected in binary coded decimal.
Writes to this register have no effect. A value of FF indicates that this value is
undetermined. Writes to this register have no effect.
Example: 15 mV tolerance would be saved as 15h.
9.3.3.9 RES3: Reserved 3a
This locations are reserved. Writes to this register have no effect.
9.3.4 Processor Uncore Data
This section contains silicon-related data relevant to the processor Uncore.
9.3.4.1 MAXQPI: Maximum Intel QPI Transfer Rate
Systems may need to read this offset to decide if all installed processors support the
same Intel QPI Link Transfer Rate. The data provided is the transfer rate, rounded to a
whole number, and reflected in binary coded decimal. Writes to this register have no
effect.
Example: The Intel® Xeon® E7 v2 processor supports a maximum Intel QPI link
transfer rate of 8.0 GT/s. Therefore, offset 2Ah-2Bh has a value of 8000.
9.3.4.2 MAXPCI: Maximum PCIe Transfer Rate
Systems may need to read this offset to decide if all installed processors support the
same PCIe Link Transfer Rate. The data provided is the transfer rate, rounded to a
whole number, and reflected in binary coded decimal. Writes to this register have
no effect.
Offset: 28h
Bit Description
7:0 Core Voltage Tolerance, Low
00h-FFh: mV
Offset: 29h
Bit Description
7:0 RESERVED
00h-FFh: Reserved
Offset: 2Ah-2Bh
Bit Description
15:0 Maximum Intel QPI Transfer Rate
0000h-FFFFh: MHz