Vol 1

Intel® Xeon® Product 2800/4800/8800 v2 Product Family 165
Datasheet Volume One, February 2014
PIROM
9 PIROM
9.1 Processor Information ROM
The Processor Information ROM (PIROM) is a memory device located on the processor
and is accessible via the System Management Bus (SMBus) which contains information
regarding the processor’s features. These features are listed in table 10.1.1 below.
The PIROM resides in the lower half of the memory component (addresses 00 - 7Fh),
which is permanently write-protected by Intel. The upper half comprises the Scratch
EEPROM (addresses 80 - FFh).
9.1.1 Processor Information ROM Table
Offset/
Section
# of
Bits
Function Notes Examples
Header
00h 8 Data Format Revision Two 4-bit hex digits Start with 00h
01-02h 16 PIROM Size Size in bytes (MSB first) Use a decimal to hex transfer; 128
bytes = 0080h:
03h 8 Processor Data Address Byte pointer, 00h if not present 0Eh
04h 8 Processor Core Data Address Byte pointer, 00h if not present 1Bh
05h 8 Processor Uncore Data Address Byte pointer, 00h if not present 2A
06h 8 Package Data Address Byte pointer, 00h if not present 4Ch
07h 8 Part Number Data Address Byte pointer, 00h if not present 54h
08h 8 Thermal Reference Data Address Byte pointer, 00h if not present 66h
09h 8 Feature Data Address Byte pointer, 00h if not present 6Ch
0Ah 8 Other Data Address Byte pointer, 00h if not present 77h
0B-0Dh 16 Reserved Reserved for future use 000000h
Processor Data
0E-13h 48 S-spec/QDF Number Six 8-bit ASCII characters QFJP = 20, 20, 51, 46, 4A, 50
14h 7/1 Sample/Production First seven bits reserved 0b = Sample, 1b = Production
00000001 = production
15 6
2
Number of Cores
Number of Threads
[7:2] = Number of cores
[1:0] = Threads per core
00111110 = 15 cores with 2
threads each
16-17h 16 System Clock Speed Four 4-bit hex digits (Mhz) 0100h = 100MHz
1
18-1A 16 Reserved Reserved for future use 000000h
Processor Core Data
1B-1Ch 16 CPUID Four 4-bit hex digits 06E2h = 06E2
1D-1Eh 16 Reserved Reserved for future use 0000h
1F-20h 16 Maximum P1 Core Frequency Non-Turbo Boost (MHz)
Four 4-bit hex digits (MHz)
2500h = 2500 MHz
1
21-22h 16 Maximum P0 Core Frequency Turbo Boost (MHz)
Four 4-bit hex digits (MHz)
2800h = 2800 MHz
1
23-24h 16 Maximum Core Voltage ID Four 4-bit hex digits (mV) 1350h = 1350 mV
1
25-26h 16 Minimum Core Voltage ID Four 4-bit hex digits (mV) 0800h = 800 mV
1
27h 8 Core Voltage Tolerance, High Allowable positive DC shift
Two 4-bit hex digits (mV)
15h = 15mV
1