Vol 1
4 Intel® Xeon® Processor E7-8800/4800/2800 v2 Product Family
Datasheet Volume One, February 2014
3.2.6 Package C-State Power Specifications........................................................40
3.3 System Memory Power Management ....................................................................40
3.3.1 CKE Power-Down....................................................................................40
3.3.2 Self Refresh...........................................................................................41
3.3.3 DRAM I/O Power Management..................................................................42
3.4 DMI2/PCI Express Power Management..................................................................42
4 Thermal Management Specifications........................................................................43
4.1 Package Thermal Specifications ...........................................................................43
4.1.1 Thermal Specifications.............................................................................43
4.1.2 TCASE and DTS Based Thermal Specifications.............................................44
4.1.3 Intel® Xeon® E7v2 Processor Thermal Profiles...........................................45
4.1.4 Thermal Metrology..................................................................................57
4.2 Processor Core Thermal Features.........................................................................58
4.2.1 Processor Temperature............................................................................58
4.2.2 Adaptive Thermal Monitor........................................................................58
4.2.3 On-Demand Mode...................................................................................60
4.2.4 PROCHOT_N Signal.................................................................................60
4.2.5 THERMTRIP_N Signal ..............................................................................61
4.2.6 Integrated Memory Controller (IMC) Thermal Features.................................61
5 Signal Descriptions ..................................................................................................63
5.1 System Memory Interface...................................................................................63
5.2 PCI Express Based Interface Signals.....................................................................63
5.3 DMI2/PCI Express Port Signals ............................................................................63
5.4 Intel QuickPath Interconnect Signals ....................................................................64
5.5 PECI Signal.......................................................................................................64
5.6 System Reference Clock Signals ..........................................................................64
5.7 JTAG and TAP Signals.........................................................................................64
5.8 Serial VID Interface (SVID) Signals......................................................................65
5.9 PIROM Signals...................................................................................................65
5.10 Processor Asynchronous Sideband and Miscellaneous Signals...................................66
5.11 Processor Power and Ground Supplies ..................................................................68
6 Electrical Specifications ...........................................................................................69
6.1 Processor Signaling............................................................................................69
6.1.1 System Memory Interface Signal Groups....................................................69
6.1.2 PCI Express Signals ................................................................................69
6.1.3 DMI2/PCI Express Signals........................................................................69
6.1.4 Intel® QuickPath Interconnect (Intel® QPI)...............................................69
6.1.5 Platform Environmental Control Interface (PECI).........................................70
6.1.6 System Reference Clocks (BCLK{0/1}_DP, BCLK{0/1}_DN).........................70
6.1.7 JTAG and Test Access Port (TAP) Signals....................................................71
6.1.8 Processor Sideband Signals......................................................................71
6.1.9 Power, Ground and Sense Signals.............................................................71
6.1.10 Reserved or Unused Signals.....................................................................77
6.2 Signal Group Summary.......................................................................................77
6.3 Power-On Configuration (POC) Options.................................................................80
6.4 Fault Resilient Booting (FRB)...............................................................................80
6.5 Mixing Processors ..............................................................................................81
6.6 Flexible Motherboard Guidelines (FMB) .................................................................82
6.7 Absolute Maximum and Minimum Ratings..............................................................82
6.7.1 Storage Conditions Specifications..............................................................82
6.8 Power Limit Specifications...................................................................................83
6.9 DC Specifications...............................................................................................84
6.9.1 Voltage and Current Specifications............................................................84
6.9.2 Die Voltage Validation .............................................................................88
6.9.3 Signal DC Specifications ..........................................................................89