Hub Datasheet

82 Intel
®
E7505 Chipset MCH Datasheet
Register Description
3.6.5 RID—Revision Identification Register (D0:F1)
Address Offset: 08h
Default Value: see table below
Sticky No
Attribute: RO
Size: 8 bits
This register contains the revision number of the MCH Device 0.
3.6.6 SUBC—Sub-Class Code Register (D0:F1)
Address Offset: 0Ah
Default Value: 00h
Sticky No
Attribute: RO
Size: 8 bits
3.6.7 BCC—Base Class Code Register (D0:F1)
Address Offset: 0Bh
Default Value: FFh
Sticky No
Attribute: R/O
Size: 8 bits
Bits
Default,
Access
Description
7:0
00h
RO
Revision Identification Number (RID). This is an 8-bit value that indicates the
revision identification number for the MCH Device 0. This number is always the same
as the RID for function 0.
03h = B-0 Stepping.
Bits
Default,
Access
Description
7:0
00h
RO
Sub-Class Code (SUBC). This is an 8-bit value that indicates the category of Bridge
into which the MCH falls. The code is 00h.
Bits
Default,
Access
Description
7:0
FFh
RO
Base Class Code (BASEC). This is an 8-bit value that indicates the Base Class Code
for the MCH.
FFh =Non-defined device. Since this function is used for error conditions, it does not fall
into any other class.