Hub Datasheet

Intel
®
E7505 Chipset MCH Datasheet 77
Register Description
3.5.34 TOLM—Top of Low Memory Register (D0:F0)
Address Offset: C4–C5h
Default Value: 0800h
Attribute: R/W
Size: 16 bits
This register contains the maximum address below 4 GB that should be treated as a memory
access, and is defined on a 128-MB boundary. Usually, it will sit below the areas configured for
hub interface and PCI memory and the graphics aperture. Note that the memory address found in
DRB7 reflects the top of total memory. In the event that there is less than 4 GB of DRAM and PCI
space in the system, these two registers will be identical.
3.5.35 REMAPBASE—Remap Base Address Register (D0:F0)
Address Offset: C6–C7h
Default Value: 03FFh
Attribute: RO, R/W
Size: 16 bits
Bits
Default,
Access
Description
15:11
00001b
R/W
Top of Low Memory (TOLM). This register contains the address that corresponds to
bits 31 to 27 of the maximum main memory address that lies below 4 GB. Configuration
software should set this value to either the maximum amount of memory in the system
or to the minimum address allocated for PCI memory or the graphics aperture,
whichever is smaller. Address bits 15:0 are assumed to be 0000h for the purposes of
address comparison. Addresses equal to or greater than the TOLM, and less than 4 GB,
are treated as accesses to HI. All accesses less than the TOLM are treated as DRAM
accesses (except for the 15-16 MB or PAM gaps).
This register must be set to at least 0800h, for a minimum of 128 MB of DRAM. There is
also a minimum of 128 MB of PCI space, since this register is on a 128-MB boundary.
Configuration software should set this value to either the maximum amount of memory
in the system (same as DRB7), or to the lower 128-MB boundary of the Memory
Mapped I/O range, whichever is smaller.
Programming example: 1100_00h = 3 GB (assuming that DRB7 is set > 4 GB):
An access to 0_C000_0000h or above (but <4 GB) will be considered above the TOLM
and therefore not to main memory. It may go to one of the HI’s or be subtractively
decoded to HI_A. An access to 0_BFFF_FFFFh and below will be considered below the
TOLM and go to main memory.
10:0 Reserved
Bits
Default,
Access
Description
15:10 Reserved
9:0
3FFh
R/W
Remap Base Address 35:26. The value in this register defines the lower boundary of
the Remap window. The Remap window is inclusive of this address. In the decoder
A25:0 of the Remap Base Address are assumed to be zeros. Thus, the bottom of the
defined memory range will be aligned to a 64-MB boundary.
When the value in this register is greater than the value programmed into the Remap
Limit register, the Remap window is disabled.